AKD4129-A Datasheet, PDF (7/52 Pages) Asahi Kasei Microsystems – Evaluation board

[AKD4129-A]
(1)-2. 10ϐϯίωΫλ (PORT1ʙ3) Λհͯ͠֎෦઀ͱثػଓ͢Δ৔߹
(1)-2-1. RXͷઃఆ
ޫίωΫλɿPORT6ʙ8 (OPT), BNCίωΫλɿJ1ʙ3(COAX) ͸࢖༻͠·ͤΜͷͰɺ͜͜ʹ͸Կ΋
઀ଓ͠ͳ͍ͰԼ͍͞ɻ
(1)-2-2. IBICK1ʙ3, ILRCK1ʙ3, SDTI1ʙ3ͷઃఆ
֎෦͔ثػΒग़ྗ͞ΕΔΫϩοΫ (֤IBICK, ILRCK) ͓Αͼσʔλ (֤SDTI)Λ10ϐϯίωΫλΛ
հͯ͠AK4129 (U1)͢·͠څڙʹɻ
JP27
IMCL K -S EL
EXT
DSP 1
DIR
IBICKx ILRCKx
˞ɿʮxʯʹ͸1ʙ3·Ͱͷ਺ࣈ͕ೖΓ·͢ɻ
SDTIx
(1)-2-3. SDTI1, SDTI2, SDTI3ͷઃఆ
AK4129 (U1)ͷSDTI1, SDTI2, SDTI3ʹೖྗ͢ΔσʔλΛબ୒͠·͢ɻ
(a) ಉظϞʔυ(INAS pin = “L”)Λ࢖༻͢Δ৔߹ (Default)

JP5
JP6
J P7
SDTI1-SEL
SD TI2-SE L
SDTI3-SEL
J P8
SDTI4-SEL
A sync hro nous
S ync hronous
GND
A syn ch ro n o u s
S ync hronous
GND
A sync hronous
S ync hrono us
GND
As ynchronous
S ync hronous
GND
(b) ඇಉظϞʔυ(INAS pin = “H”)Λ࢖༻͢Δ৔߹

JP5
JP6
SDTI1-SEL
SD TI2-SE L
J P7
SDTI3-SEL
J P8
SDTI4-SEL
A sync hro nous
S ync hronous
GND
A syn ch ro n o u s
S ync hronous
GND
A sync hronous
S ync hrono us
GND
As ynchronous
S ync hronous
GND
(c) SDTI1,SDTI2,SDTI3ΛGNDʹ઀ଓ͢Δ৔߹

JP5
JP6
SDTI1-SEL
SD TI2-SE L
J P7
SDTI3-SEL
J P8
SDTI4-SEL
A sync hro nous
S ync hronous
GND
A syn ch ro n o u s
S ync hronous
GND
A sync hronous
S ync hrono us
GND
As ynchronous
S ync hronous
GND













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-7-
2010/06