AK8133 Datasheet, PDF (7/10 Pages) Asahi Kasei Microsystems – Low Suprious Multiclock Generator for Audio

AK8133
PCB Layout Consideration
The AK8133 is a high-accuracy and low-jitter multi clock generator. For proper performances specified in
this datasheet, careful PCB layout should be taken. The followings are layout guidelines based on the
typical connection diagram shown in Figure 1
Power supply line – AK8133 has three power supply pins (VDD1-3) which deliver power to internal
circuitry segments. A 0.1mF decoupling capacitor should be placed as close to each VDD pin as possible.
Ground pin connection – AK8133 has two ground pins (GND1-2). These pin require connecting to plane
ground which will eliminate any common impedance with other critical switching signal return. 0.1mF
decoupling capacitors placed at VDD1, VDD2, and VDD3 should be grounded at close to the GND1pin, the
GND2 pin, and the GND2, respectively.
Crystal connection – Proper oscillation performance are susceptible to stray or parasitic capacitors
around crystal. The wiring traces to a crystal form X1 (Pin 1) and X2 (Pin 14) have equal lengths with no
via and as short in length as possible. These traces should be also located away from any traces with
switching signal.
MS0930-E-00
-7-
Mar-08