AK6516C Datasheet, PDF (7/17 Pages) Asahi Kasei Microsystems – SPI bus 256Kbit Serial CMOS EEPROM

ASAHI KASEI
[AK6516C]
WRSR (WRITE STATUS REGISTER)
The WRSR instruction can set the Write Protect Block size of the memory array.
AK6516C has 4 Blocks of memory arrays. Write Protect Block size can be selected from 1/4, 1/2
and whole memory array. The block, which is set by Write Protect, is Read only.
BP0 bit, BP1 bit, and WPEN bit are programmable with EEPROM memory cell bits. The
characteristics of those bits (WREN, tE/W, RDSR) are same as the EEPROM memory array.
WP pin function can be set by WPEN (WRITE PROTECT ENABLE) bit which is defined by WRSR
function. When WP pin is low level and WPEN bit is "1", the WRITE function to Status register,
which has WPEN bit and BP0/BP1 bit, and to Write Disable Block is not performed. Then WRITE
function is performed only to the Write enable block.
When WP pin is "1" or WPEN bit is "0", then the function of WP pin is disabled and WRITE function
to the Status Register is performed.
WREN function should be done before WRSR function. And after the Programming function,
AK6516C becomes Write Disable status automatically.
CS
SCK
SI
SO
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0 0 0 0 X 0 0 1 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Hi-Z
WRSR
X = don’t care
WPEN
Bit
0
0
1
1
X
X
WP
Pin
X
X
Low
Low
High
High
WEN
Bit
0
1
0
1
0
1
Write Protected
Block
Not Protected
Block
Status Register
WRITE Disable WRITE Disable WRITE Disable
WRITE Disable WRITE Enable WRITE Enable
WRITE Disable WRITE Disable WRITE Disable
WRITE Disable WRITE Enable WRITE Disable
WRITE Disable WRITE Disable WRITE Disable
WRITE Disable WRITE Enable WRITE Enable
Table 3. WPEN function
Status Register bits
BP1
BP0
0
0
0
1
1
0
1
1
Write Protected
Block
none
6000h - 7FFFh
4000h - 7FFFh
0000h - 7FFFh
Table 4. Write Protected Block Size
DAP05E-00
-7-
2005/03