AK93C85A_04 Datasheet, PDF (6/13 Pages) Asahi Kasei Microsystems – 16K / 32K / 64Kbit Serial CMOS EEPROM

ASAHI KASEI
[AK93C85A/95A/10A]
READ
The read instruction is the only instruction which outputs serial data on the DO pin.
Following the Start bit, first Op code and address are decoded, then the data from the selected
memory location is available at the DO pin. A dummy bit (logical "0") precedes the 16-bit data from
the selected memory location. The output data changes are synchronized with the rising edges of
the serial clock (SK).
The data in the next address can be read sequentially by continuing to provide clock. The address
automatically cycles to the next higher address after the 16bit data shifted out.
AK93C85A・・When the highest address is reached ($3FF), the address counter rolls over
to address $000 allowing the read cycle to be continued indefinitely.
AK93C95A・・When the highest address is reached ($7FF), the address counter rolls over
to address $000 allowing the read cycle to be continued indefinitely.
AK93C10A・・When the highest address is reached ($FFF), the address counter rolls over
to address $000 allowing the read cycle to be continued indefinitely.
CS
SK
DI
DO
012345
12 13 14 15
29 30
44 45
0 1 1 0 A9 A8
A1 A0
Start bit Op code
Hi-Z
AK93C85A output a logic "1" (Ready status),
if previous instruction is WRITE.
0 D15 D14
D0
Dummy
Bit
address[A9–A0]
READ (AK93C85A)
D15
D1 D0
address[A9–A0]+1
CS
SK
DI
DO
012345
13 14 15 16
30 31
45 46
0 1 1 0 A10 A9
A1 A0
Start bit Op code
Hi-Z
AK93C95A output a logic "1" (Ready status),
if previous instruction is WRITE.
0 D15 D14
D0
Dummy
Bit
address[A10–A0]
READ (AK93C95A)
D15
D1 D0
address[A10–A0]+1
CS
SK
DI
DO
012345
14 15 16 17
31 32
46 47
0 1 1 0 A11 A10
A1 A0
Start bit Op code
Hi-Z
AK93C10A output a logic "1" (Ready status),
if previous instruction is WRITE.
0 D15 D14
D0
Dummy
Bit
address[A11–A0]
READ (AK93C10A)
D15
D1 D0
address[A11–A0]+1
DAM02E-03
-6-
2004/05