AK93C45B_03 Datasheet, PDF (6/14 Pages) Asahi Kasei Microsystems – 1K / 2K / 4K / 8Kbit Serial CMOS EEPROM

ASAHI KASEI
[AK93C45B/55B/65B/75B]
READ
The read instruction is the only instruction which outputs serial data on the DO pin.
Following the Start bit, first Op code and address are decoded, then the data from the selected
memory location is available at the DO pin. A dummy bit (logical "0") precedes the 16-bit data from
the selected memory location. The output data changes are synchronized with the rising edges of
the serial clock (SK).
The data in the next address can be read sequentially by continuing to provide clock. The address
automatically cycles to the next higher address after the 16bit data shifted out.
When the highest address is reached, the address counter rolls over to address $00 or $000
allowing the read cycle to be continued indefinitely.
CS
SK
012345
8 9 10 11
25 26
40 41
DI
DO
0 1 1 0 A5 A4
A1
Start bit Op code
Hi-Z
AK93C45B output a logic "1" (Ready status),
if previous instruction is WRITE.
A0
0 D15 D14
D0
Dummy
Bit
address[A5–A0]
D15
D1 D0
address[A5–A0]+1
READ (AK93C45B)
CS
SK
012345
10 11 12 13
27 28
42 43
DI
0 1 1 0 X / _A7 A6
A1 A0
Start bit Op code
DO
Hi-Z
AK93C55B/65B output a logic "1" (Ready status),
if previous instruction is WRITE.
0 D15 D14
D0
Dummy
Bit
address[A6/A7–A0]
*Address bit A7 becomes a "don't care" for AK93C55B.
D15
D1 D0
address[A6/A7–A0]+1
X: Don't care
READ (AK93C55B/65B)
CS
SK
012345
12 13 14 15
29 30
44 45
DI
0 1 1 0 X A8
A1 A0
Start bit Op code
DO
Hi-Z
0 D15 D14
D0 D15
D1 D0
AK93C75B output a logic "1" (Ready status),
if previous instruction is WRITE.
Dummy
Bit
address[A8–A0]
address[A8–A0]+1
X: Don't care
READ (AK93C75B)
DAM04E-02
-6-
2003/05