AK5373 Datasheet, PDF (50/53 Pages) Asahi Kasei Microsystems – 24-bit Stereo ADC with USB Interface

[AK5373]
1. Grounding and Power Supply Decoupling
The AK5373 requires careful attention to power supply and grounding arrangements. AVDD and DVDD are usually
supplied from the system’s analog supply. If AVDD and DVDD are supplied separately, the power-up sequence is not
critical. VSS1-3 of the AK5373 must be connected to the analog ground plane. System analog ground and digital ground
must be connected together near to where the supplies are brought onto the printed circuit board. Decoupling capacitors
must be as near to the AK5373 as possible, with the small value ceramic capacitor being the nearest.
2. Voltage Reference
The voltage of VREF is 2.2V (typ) and set the analog input range. VCOM is 50%VREF and a signal ground of this chip.
A 4.7μF electrolytic capacitor in parallel with a 0.1μF ceramic capacitor attached to the VREF pin and the VCOM pin
eliminates the effects of high frequency noise. No load current may be drawn from the VREF pin and the VCOM pin. All
signals, especially clocks, should be kept away from the VREF pin and the VCOM pin in order to avoid unwanted
coupling into the AK5373.
3. Analog Inputs
The analog inputs are full-differential and input resistance is 20kΩ (typ). The input signal range is typ. ±0.038Vpp
(@MGAIN = +30dB) and typ. ±1.2Vpp (@MGAIN = 0dB), centered around the internal common voltage (typ. 1.1V).
Usually the input signal is AC coupled using a capacitor. The cut-off frequency is fc = 1/ (2πRC). The DC offset including
the ADC’s own DC offset is removed by the internal HPF (fc=0.93Hz@fs=48kHz). The AK5373 can accept input
voltages from VSS1 to VREF.
MS1202-E-00
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2010/06