AKD4563A_06 Datasheet, PDF (5/32 Pages) Asahi Kasei Microsystems – 16bit 4ch A/D and 2ch D/A converter,

ASAHI KASEI
[AKD4563A]
2) Evaluation of D/A using A/D converted data.
It is possible to make evaluation in the form of analog inputs and analog outputs by interfacing with various
AKM’s A/D evaluation boards with PORT3. Nothing should be connected to PORT1, PORT4. In case of
using external clock through a BNC connector (J1), select EXT on JP11 (CLK) and short JP12 (XTE).
JP3
X_BCLK
JP4
LRCK
JP5
BCLK
JP9
SDTI
JP10
DIR
JP11
CLK
JP12
XTE
32fs 64fs ADC DIR ADC DIR ADC DIR VD GND
3) Evaluation of D/A using DIR. (Optical link)
PORT4 (DIR) is used. DIR generates MCLK, BCLK, LRCK and SDATA from the received data through
optical connector (TORX176). Used for the evaluation using CD test disk. Nothing should be connected to
PORT1, PORT3.
JP3
X_BCLK
JP4
LRCK
JP5
BCLK
JP9
SDTI
JP10
DIR
JP11
CLK
JP12
XTE
32fs 64fs ADC DIR ADC DIR ADC DIR VD GND
4) Evaluation of A/D using D/A converted data.
It is possible to make evaluation in the form of analog inputs and analog outputs by interfacing with
various AKM’s D/A evaluation boards with PORT3. Nothing should be connected to PORT4. When
SDTO0 is supplied from PORT1, JP8 (SD0/1) selects SD0 side. When SDTO1 is supplied from PORT1,
JP8 (SD0/1) selects SD1 side.
JP3
X_BCLK
JP4
LRCK
JP5
BCLK
JP9
SDTI
JP10
DIR
JP11
CLK
JP12
XTE
32fs 64fs ADC DIR ADC DIR ADC DIR VD GND
<KM064401>
-5-
2006 / 06