AKD4114 Datasheet, PDF (5/23 Pages) Asahi Kasei Microsystems – AK4114 Evaluation Board Rev.0

ASAHI KASEI
[AKD4114-B]
(2) Evaluation for DIT
Serial Data in(10pin port) – AK4114 – S/PDIF out(optical or BNC)
MCLK, BICK, LRCK and DAUX are input the via 10pin header (PORT2: DIR). The AKD4114-B can be
connected with the AKM’s DAC evaluation board via 10-line cable.
a. Set-up of a Bi-phase output signal
TX0 and TX1 should not select an optical connector or a BNC connector at the same time.
a-1. The data outputted from TX1 can be selected by OPS12-10 bit.
Connector
JP19 (TX1)
Optical (PORT4)
OPT
BNC (J4)
BNC
Table 9. Set-up of TX1
JP14 (TX1)
BNC
BNC
a-2. As for TX0, only the loop back mode of RX corresponds. This mode is fixed to RX0 in parallel mode. In
serial mode, it can be selected by OPS02-00 bits.
Connector
Optical (PORT4)
BNC (J4)
JP13 (TX0) JP19 (TXP1)
OPT
Open
BNC
Open
Table 10. Set-up of TX0
JP14 (TXN1)
BNC
BNC
b. Set-up of clock input and output
The used signals are MCKO1, MCKO2, LRCK, BICK, ELRCK and DAUX.
The signal level outputted and inputted from PORT2 and PORT5 is 3.3V.
Clock
PORT
MCLK
PORT2
BICK
PORT2
LRCK
PORT2
DAUX
PORT2
Table 11. Clock input/output
b-1. MCKO1/MCKO2
The output of MCKO1 pin or MCKO2 pin can be selected by JP12. The output frequency of MCKO1/MCKO2
sets up by OCKS 1-0.
Output
signal
JP12
JP15
JP11
MCKO1 MCKO1
MCKO
MCKO1
MCKO2 MCKO2
MCKO
MCKO2
Table 12. Selection of MCKO1/MCKO2
Default
<KM076600>
-5-
2004/11