AK5578EN Datasheet, PDF (5/70 Pages) Asahi Kasei Microsystems – 8-Channel Differential 32-bit  ADC

■ Pin Functions
No. Pin Name I/O
Function
1 AVSS1
2 AVDD1
3 AIN3P
4 AIN3N
5 VREFL2
6 VREFH2
7 AIN4N
8 AIN4P
9 AIN5P
10 AIN5N
11 VREFH3
12 VREFL3
13 AIN6N
14 AIN6P
15 AVDD2
16 AVSS2
17 AIN7P
18 AIN7N
19 VREFH4
20 VREFL4
21 AIN8N
22 AIN8P
23 TEST
24 MCLK
25 TVDD
26 DVSS
- Analog Ground Pin(AIN1-4)
- Analog Power Supply Pin(AIN1-4), 4.75-5.25 V
I Channel 3 Positive Input Pin
I Channel 3 Negative Input Pin
I ADC Low Level Voltage Reference Input Pin
I ADC High Level Voltage Reference Input Pin
I Channel 4 Negative Input Pin
I Channel 4 Positive Input Pin
I Channel 5 Positive Input Pin
I Channel 5 Negative Input Pin
I ADC High Level Voltage Reference Input Pin
I ADC Low Level Voltage Reference Input Pin
I Channel 6 Negative Input Pin
I Channel 6 Positive Input Pin
- Analog Power Supply Pin(AIN5-8), 4.75-5.25 V
- Analog Ground Pin(AIN5-8)
I Channel 7 Positive Input Pin
I Channel 7 Negative Input Pin
I ADC High Level Voltage Reference Input Pin
I ADC Low Level Voltage Reference Input Pin
I Channel 8 Negative Input Pin
I Channel 8 Positive Input Pin
I TEST Enable Pin. This pin is pull down by 100kΩ internally
I Master Clock Input Pin
-
Digital I/O Buffers and LDO Power Supply Pin
1.7-1.98 V (LDOE pin= “L”) or 3.0-3.6 V (LDOE pin= “H”).
- Digital Ground Pin
I Digital Core Power Supply Pin, 1.7-1.98 V (LDOE pin= “L”)
27 VDD18
O LDO Stabilization Capacitor Connect Pin. (LDOE pin= “H”)
28 PDN
29 PW0
30 PW1
31 PW2
32 MSN
BICK
33
DCLK
LRCK
34
DSDOL1
I
Reset & Power Down Pin
“L”: Reset & Power down, “H” : Normal operation
I Power Management Pin, Channel Summation select Pin
I Power Management Pin, Channel Summation select Pin
I Power Management Pin, Channel Summation select Pin
I
Master/Slave Select Pin
“L”: Slave Mode, “H” : Master Mode
I
Audio Serial Data Clock Input Pin in PCM & Slave Mode.
This pin is pulled down by 100 kΩ internally
O
Audio Serial Data Clock Output Pin in PCM & Master Mode
This pin is pulled down by 100 kΩ internally
O
DSD Clock Output Pin in DSD Mode
This pin is pulled down by 100 kΩ internally
I
Channel Clock Input Pin in PCM & Slave Mode
This pin is pulled down by 100 kΩ internally
O
Channel Clock Output Pin in PCM & Master Mode
This pin is pulled down by 100 kΩ internally
O
Audio Serial Data Output Pin for AIN1 in DSD Mode
This pin is pulled down by 100 kΩ internally
[AK5578]
Power Down
Status
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Hi-z & Pull
Down with
500 Ω
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Hi-z
Hi-z
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Hi-z
Hi-z
015016736-E-00
-5-
2015/12