AKD4628A-B Datasheet, PDF (4/44 Pages) Asahi Kasei Microsystems – single chip CODEC that includes two channels of ADC and eight channels of DAC.

[AKD4628A-B]
5.DIF0 (SW2-6) set up of AK4103A Audio Serial Interface Format.
DIF0
OFF
ON
Audio Serial
LRCK
BICK
Interface Format
24bit, Left justified
24bit, I²S
H/L 48fs-128fs
L/H 48fs-128fs
Table 7. Set up of Audio Serial Interface Format
Default
Jumper pin set up
[JP1] (GND)
---Analog GND and Digital GND
[JP4, 5, 6, 7]
(SDTI1, 2, 3, 4) --- AK4628A SDTI1, 2, 3, 4 input source select
<DSP>
: Serial Data is input from DSP via PORT4.
<4112A>
: Serial Data is input from AK4112B SDTO. <default>
[JP3] (V/TX)
<V>
<TX>
--- AK4112B V/TX output select.
: Validity.
: Transmit channel (through data)
<default>
[JP2](OPT/COAX) --- The source of the biphase signal input to the AK4112B
<OPT_IN> : Optical input to RX1 of AK4112B
<default>
<RX2>
: BNC input to RX1 of AK4112B
The function of the toggle SW.
[SW1]: Resets the AK4628A, AK4112B and AK4103A. Keep “H” during normal operation.
The indication content for LED.
[LE1] (DZF1)
[LE2] (DZF2_OVF)
[LE3] (ERF)
[LE4] (FS96)
[LE5] (AUTO)
[LE6] (V)
: Zero detection
: Zero detection or Overflow Detection
: AK4112B unlock and parity error output.
: AK4112B 96kHz sampling detect.
: AK4112B AC-3/MPEG detect.
: AK4112B Validity detect
<KM084901>
-4-
2007/07