AK4117_10 Datasheet, PDF (34/37 Pages) Asahi Kasei Microsystems – Low Power 192kHz Digital Audio Receiver

[AK4117]
SYSTEM DESIGN
Figure 29 is a system connection diagram. An evaluation board is available which demonstrates application circuits, the
optimum layout, power supply arrangements and measurement results.
3.3V Supply
S/PDIF
(see Figure 12-14)
12k
+
10u 0.1u
(Shield)
3.3V Supply
(see Figure 8-10)
10u 0.1u
+
C
C
DSP
1R
2 AVDD
3 RX1
4 NC
5 RX0
6 DVDD
7 DVSS
8 XTI
9 XTO
10 LRCK
11 BICK
12 SDTO
AK4117
AVSS 24
PDN 23
INT0 22
INT1 21
CSN 20
CCLK 19
CDTI 18
CDTO 17
UOUT 16
NC 15
MCKO 14
DAUX 13
Micro-
controller
AD/DA
Figure 29. Typical Connection Diagram
Notes:
(1) “C” depends on the X’tal. (Typ.10-40pF)
(2) AVSS and DVSS must be connected the same ground plane.
MS0157-E-04
- 34 -
2010/08