AKD4628 Datasheet, PDF (3/39 Pages) Asahi Kasei Microsystems – Evaluation board Rev.B for AK4628

ASAHI KASEI
[AKD4628]
n Evaluation mode
1) Evaluation of ADC
TOTX176 is used for digital output. Clock mode of the AK4112B should be set to PLL mode or X’tal mode.
2) Evaluation of DAC
TORX176 or BNC is used for digital input. Clock mode of the AK4112B should be set to PLL mode. “4112A”
should be selected on JP4,5,6 and 7.
3) Loopback mode
Clock mode of the AK4112B should be set to PLL mode or X’tal mode. “4112A” should be selected
on JP4,5,6 and 7.
4) Evaluation of DAC using DSP
“DSP” should be selected on JP4,5,6 and 7.
Evaluation mode AK4112B clock set-up
JP4,5,6,7 Used I/F
ADC
CM1=”0”, CM0=”0”(PLL mode) or Don’t
TOTX176
CM1=”0”, CM0=”1”(X’tal mode) care
optical output
DAC
CM1=”0”, CM0=”0”(PLL mode)
“4112A”
Loopback
CM1=”0”, CM0=”1”(X’tal mode) “4112A”
Using DSP
CM1=”0”, CM0=”0”(PLL mode)
“DSP” PORT5(10-pin Header)
(Note.)1. Software “4112.exe” packed with the AKD4628 is used for set-up of the AK4112B.
2. CM1 and CM0 bits are D5 and D4 of Addr=00H, respectively
Table 2.Evalution mode
n DIP Switch set up. (See the datasheet of AK4628 and AK4103)
1.DFS_4628(SW2-1) set up of AK4628 Sampling speed(fs).
DFS_4628
OFF
ON
Sampling Speed (fs)
Normal Speed Mode 32kHz~48kHz
Double Speed Mode 64kHz~96kHz
Table 3. Set up of Sampling Speed (fs)
Default
2.V(SW2-2) set up of for AK4103Validity detect.
V
Validity
OFF
Valid
Default
ON
Invalid
Table 4. Set up of Validity
3.FS3(SW2-3) FS2(SW2-4) set up of AK4103 sampling frequency setting.
FS3 FS2 Sampling frequency setting
OFF OFF
44.1kHz
Default
OFF ON
48kHz
ON OFF
Reserved
ON
ON
32kHz
Table 5. Set up of sampling frequency setting
4.CKS0(SW2-5) set up of AK4103 System Clock .
CKS1
OFF
ON
MCLK
fs
256fs
28k-108kHz ^Default
512fs
28k-54kz
Table 6.Set up of System Clock
<KM069700>
-3-
2002/9