AK4458 Datasheet, PDF (27/84 Pages) Asahi Kasei Microsystems – 115dB 768kHz 32-bit 8ch Premium DAC

[AK4458]
1. Manual Setting Mode (ACKS bit = “0”)
MCLK frequency is detected automatically and the sampling rate is set by DFS2-0 bits (Table 2). The MCLK
frequency corresponding to each sampling speed should be provided externally (Table 3, Table 4). The
AK4458 is set to Manual Setting Mode at power-up (PDN pin = “L” →“H”). When DFS2-0 bits are changed,
the AK4458 should be reset by RSTN bit.
DFS2 DFS1 DFS0
Sampling Rate (fs)
0
0
0
Normal Speed Mode
8kHz  54kHz ^(default)
0
0
1
Double Speed Mode 54kHz  108kHz
0
1
0
Quad Speed Mode 120kHz  216kHz
0
1
1
Reserved
(*)
1
0
0
Oct Speed Mode
384kHz
1
0
1
Hex Speed Mode
768kHz
1
1
0
Reserved
(* Shift to 384kHz)
1
1
1
Reserved
(* Shift to 768kHz)
Table 2. Sampling Speed (Manual Setting Mode)
LRCK
Fs
32.0kHz
44.1kHz
48.0kHz
88.2kHz
96.0kHz
176.4kHz
192.0kHz
384kHz
768kHz
MCLK(MHz)
16fs 32fs 48fs
64fs
96fs 128fs
N/A N/A N/A
N/A
N/A
N/A
N/A N/A N/A
N/A
N/A
N/A
N/A N/A N/A
N/A
N/A
N/A
N/A N/A N/A
N/A
N/A
N/A
N/A N/A N/A
N/A
N/A
N/A
N/A N/A N/A
N/A
N/A 22.5792
N/A N/A N/A
N/A
N/A 24.5760
N/A 12.288 18.432 24.576 36.864 49.152
12.288 24.576 36.864 49.152 N/A N/A
Table 3. System Clock Example (Manual Setting Mode)
Sampling
Speed
Normal
Double
Quad
Quad
Oct
Hex
LRCK
fs
32.0kHz
44.1kHz
48.0kHz
88.2kHz
96.0kHz
176.4kHz
192.0kHz
384kHz
768kHz
MCLK(MHz)
192fs 256fs 384fs 512fs 768fs 1024fs 1152fs
N/A 8.1920 12.2880 16.3840 24.5760 36.8640 36.8640
N/A 11.2896 16.9344 22.5792 33.8688 N/A
N/A
N/A 12.2880 18.4320 24.5760 36.8640 N/A
N/A
N/A 22.5792 33.8688 45.1584 N/A
N/A
N/A
N/A 24.5760 36.8640 49.152 N/A
N/A
N/A
33.8688 45.1584 N/A
N/A
N/A
N/A
N/A
36.8640 49.152 N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Table 4. System Clock Example (Manual Setting Mode)
Sampling
Speed
Normal
Double
Quad
Quad
Oct
Hex
014011794-E-01
- 27 -
2015/08