AK4184A Datasheet, PDF (26/36 Pages) Asahi Kasei Microsystems – TSC with Keypad Scanner and GPIO Expander

[AK4184A]
■ GPIO controller
AK4184A ͸ɺ8 ϙʔτͷೖྗ·ͨ͸ग़ྗͱͯ͠࢖༻Մೳͳ pin Λ͍࣋ͬͯ·͢ɻσʔλͷํ޲Λબ୒͢Δ GPDR
Ϩδελɺग़ྗλΠϓ(CMOS,ΦʔϓϯυϨΠϯ)Λબ୒͢Δ GPPU Ϩδελɺpin ঢ়ଶ (pull-down, Hi-Z) Λઃ
ఆ͢Δ GPSR Ϩδελɺpin ϨϕϧΛઃఆ͢Δ GPSCR Ϩδελɺpin ϨϕϧΛಡΈࠐΉ GPLR ϨδελͰ GP0
~ GP7 pins ͷઃఆΛߦ͍·͢ɻI/O ϙʔτ͸ɺϩδοΫೖྗɺCMOS ग़ྗɺΦʔϓϯυϨΠϯͷϩδοΫग़ྗ
ͷ૊Έ߹Θ͕ͤՄೳͰ͢ɻॳظ஋͸ɺϩδοΫೖྗͰϓϧμ΢ϯ͞Ε͍ͯ·͢ɻ
Pin Direction
(GPDR)
Pin Pull-up
(GPPU)
Pin State
(GPSR)
Pin Set
(GPSCR)
Pin Level
(GPLR)
GPIO Pin
Figure 15. GPIOϨδελͷઃఆ
■ GPIO Pin Set/ Clear Register (PAGE 1)
GPSCR͸ɺग़ྗpinͷϨϕϧΛઃఆ͢ΔϨδελͰ͢ɻϐϯઃఆ͕ग़ྗઃఆ(Table 28: IO bit = “1”)ͷ৔߹ͷΈ
༗ޮͰ͢ɻ࣮ࡍͷϐϯϨϕϧΛ֬ೝ͢Δ࣌͸ɺGPLRϨδελͰಡΈग़͠ՄೳͰ͢ɻ
Addr Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
10H GPSCR 0 0 0 0 0 0 0 0 SC7 SC6 SC5 SC4 SC3 SC2 SC1 SC0
Table 25. GPIO Pin Set/Clear Register Format
Bits Name
Description
15:8
Reserved
7:0
SC Set GPIO Pin level for GPIO pins
0: Set pin level low (default)
1: Set pin level high
Table 26. GPIO Pin Set/ Clear Register
■ GPIO Pin Direction Register (PAGE 1)
GPDR ͸ɺϐϯͷೖग़ྗͷํ޲Λઃఆ͢ΔϨδελͰ͢ɻ
Addr Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
11H GPDR IO7 IO6 IO5 IO4 IO3 IO2 IO1 IO0 0 0 0 0 0 0 0 0
Table 27. GPIO Pin Direction Register Format
Bits Name
Description
15:8 IO GPIO Direction select
0: GPIO pin configured as input. (default)
1: GPIO pin configured as output.
7:0
Reserved
Table 28. GPIO Direction Register
MS0947-J-00
-26-
2008/04