AK09915 Datasheet, PDF (25/42 Pages) Asahi Kasei Microsystems – 3-axis Electronic Compass

[AK09915]
10.2.2.WRITE Instruction
When the R/W bit is set to “0”, AK09915 performs write operation.
In write operation, AK09915 generates an acknowledge after receiving a start condition and the first byte
(slave address) then receives the second byte. The second byte is used to specify the address of an internal
control register and is based on the MSB-first configuration.
MSB
LSB
A7
A6
A5
A4
A3
A2
A1
A0
Figure 10.7 Register Address
After receiving the second byte (register address), AK09915 generates an acknowledge then receives the third
byte.
The third and the following bytes represent control data. Control data consists of 8-bit and is based on the
MSB-first configuration. AK09915 generates an acknowledge after every byte is received. Data transfer
always stops with a stop condition generated by the master.
MSB
LSB
D7
D6
D5
D4
D3
D2
D1
D0
Figure 10.8 Control Data
AK09915 can write multiple bytes of data at a time.
After reception of the third byte (control data), AK09915 generates an acknowledge then receives the next
data. If additional data is received instead of a stop condition after receiving one byte of data, the address
counter inside the LSI chip is automatically incremented and the data is written at the next address.
The address is incremented from 00h to 18h from 30h to32h, or from 60h to 62h. When the address is between
00h and 18h, in case that FIFO function is disabled, the address is incremented 00h  01h  02h  03h 
10h  11h ...  18h, and the address goes back to 00h after 18h. In case that FIFO function is enabled, the
address is incremented 00h  01h  02h  03h  10h  11h ...  18h, and the address goes back to 11h
after 18h. When the address is between 30h and 32h, the address goes back to 30h after 32h. When the address
is between 30h and 32h, the address goes back to 30h after 32h.
Actual data is written only to Read/Write registers (Table 11.2)
SDA
S
T
A
R/W="0"
R
T
S
Slave
Address
Register
Address(n)
Data(n)
Data(n+1)
A
A
A
A
C
C
C
C
K
K
K
K
Figure 10.9 WRITE Instruction
S
T
O
P
Data(n+x)
P
A
A
C
C
K
K
10.2.3.READ Instruction
When the R/W bit is set to “1”, AK09915 performs read operation.
If a master IC generates an acknowledge instead of a stop condition after AK09915 transfers the data at a
specified address, the data at the next address can be read.
Address can be 00h to 18h, 30h to 32h, or 60h to 62h. When the address is between 00h and 18h, in case that
FIFO function is disabled, the address is incremented 00h  01h  02h  03h  10h  11h ...  18h, and
the address goes back to 00h after 18h. In case that FIFO function is enabled, the address is incremented 00h
 01h  02h  03h  10h  11h ...  18h, and the address goes back to 11h after 18h. When the address
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