AK1575 Datasheet, PDF (23/35 Pages) Asahi Kasei Microsystems – Up Converter Mixer with Fractional-N Frequency Synthesizer and VCO

[AK1575]
Reference clock
Phase Comparison signal
T
Divided signal of RF signal
PFD output signal
This is ignored because it
cannot be sampled.
LD output
This is ignored
Valid _{because it cannot}
be sampled.
Valid
ignore
The [LD] pin outputs will be HIGH
when a phase error which is smaller
than T is detected for N times
consecutively.
Case of “R > 1”
Fig6. .Digital Lock Detect Operations
Unlock⇒Lock
No
Unlock(LD=LOW)
Flag=0
No
Phase Error < T
Yes
Flag=Flag+1
Flag>N
Yes
Lock(LD=HIGH)
MS1552-E-00
23
2013/8