AK8777B Datasheet, PDF (2/10 Pages) Asahi Kasei Microsystems – HALL EFFECT IC FOR PULSE ENCODERS

Block Diagram
VDD
VSS
REGULATOR
VREG
BIAS
HE_DRIVE
OSC
TIMING
LOGIC
CHOP_AMP
COMP
HALL SENSORS
Figure 1. Block diagram
[AK8777B]
OUTA
OUTB
Circuit Configuration
Block
REGULATOR
HALL SENSORS
CHOPPER_SW
CHOP_AMP
COMP
BIAS
HE_DRIVE
OSC
TIMING LOGIC
LATCH & LOGIC
Table 1. Circuit configuration
Function
Generate internal operating voltage.
Two Hall elements fabricated by CMOS process.
Perform chopping in order to cancel the offset of Hall sensor.
Amplifies two Hall sensor output voltage with summation and subtraction circuit.
Hysteresis comparator.
Generates bias current to internal circuits.
Generates bias current for Hall sensors.
Generates operating clock.
Generates timing signal for internal circuits.
Logical circuits and open drain driver.
MS1465-E-00
September 2012
2