AK4430 Datasheet, PDF (15/18 Pages) Asahi Kasei Microsystems – 192kHz 24-Bit Stereo ΔΣ DAC with 2Vrms Output

[AK4430]
1. Grounding and Power Supply Decoupling
VDD and CVDD are supplied from the analog supply and should be separated from the system digital supply. Decoupling
capacitors, especially 0.1μF ceramic capacitors for high frequency bypass, should be placed as near to VDD and CVDD
as possible. The VSS1 and VSS2 must be connected to the same analog ground plane. Power-up sequence between
VDD and CVDD is not critical.
2. Analog Outputs
The analog outputs are single-ended and centered at the VSS (ground) voltage. The output signal range is typically
2.0Vrms (typ @VDD=3.3V). The internal switched-capacitor filter (SCF) and continuous-time filter (CTF) attenuate the
noise generated by the delta-sigma modulator beyond the audio passband. Using single a 1^st-order LPF (Figure 11) can
reduce noise beyond the audio passband.
The output voltage is a positive full scale for 7FFFFFH (@24bit data) and a negative full scale for 800000H (@24bit
data). The ideal output is 0V (VSS) voltage for 000000H (@24bit data). The DC offset is ±5mV or less.
AK 44 30
A OU T
4 70
Analog
Out
2.0Vrms (typ)
2.2n F
(fc = 154kHz, gain = -0.28dB @ 40kHz, gain = -1.04dB @ 80kHz)
Figure 11. External 1^st order LPF Circuit Example
MS1196-E-01
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2011/03