AK6003A Datasheet, PDF (10/17 Pages) Asahi Kasei Microsystems – SOFTWARE WRITE PROTECT I2C BUS 2KBIT EEPROM

ASAHI KASEI
[AK6003A]

READ Operations
There are three basic read operations: current address read, random read, and sequential read.
Read operations are initiated in the same manner as write operations, with the exception that the
R/W bit of the slave address is set to a one.
It is noted that the ninth clock cycle of the read operation is not a "don't care". To terminate a read
operation, the master must hold SDA HIGH during the ninth clock cycle and then issue a stop
condition.
CURRENT ADDRESS READ
Internally the AK6003A contains an address counter that maintains the address of the last word
accessed, incremented by one. Therefore, if the last access (either a read or write) was to address
n, the next read operation would access data from address n+1.
Upon receipt of the slave address with R/W set to one, the AK6003A issues an acknowledge and
transmits the eight bit word. The master will not acknowledge the transfer but generate a stop
condition, and therefore the AK6003A discontinues transmission.
CURRENT ADDRESS READ
RANDOM READ
Random read operations allow the master to access any memory location in a random manner.
Prior to issuing the slave address with the R/W bit set to one, the master must first perform a
"dummy" write operation.
The master issues the start condition, slave address and then the word address it is to read. After
the word address acknowledge, the master immediately reissues the start condition and the slave
address with the R/W bit set to one. This will be followed by an acknowledge from the AK6003A and
then by the eight bit word. The master will not acknowledge the transfer but generate the stop
condition, and therefore the AK6003A discontinues transmission.
DAI03E-01
RANDOM READ
- 10 -
1999/10