80C32E_03 Datasheet, PDF (9/20 Pages) AIMTEC – Rad. Tolerant 8-bit ROMless Microcontroller

80C32E
DC Parameters
Table 3. DC Parameters in Standard VoltageTA = -55°C to +125°C; V_SS = 0V; V_CC = 5V ± 10%; F = 0 to 30 MHz.
Symbol Parameter
Min.
Max
Unit Test Conditions
V_IL
V_IH
V_IH1
V_OL
V_OL1
Input Low Voltage
Input High Voltage except XTAL1, RST
Input High Voltage, XTAL1, RST
Output Low Voltage, ports 1, 2, 3⁽⁵⁾
Output Low Voltage, port 0, ALE, PSEN⁽⁵⁾
V_OH
Output High Voltage, ports 1, 2, 3
V_OH1 Output High Voltage, port 0, ALE, PSEN
R_RST
I_IL
I_LI
I_TL
C_IO
I_PD
I_CC
RST Pull-down Resistor
Logical 0 Input Current ports 1, 2 and 3
Input Leakage Current
Logical 1 to 0 Transition Current, ports 1, 2, 3
Capacitance of I/O Buffer
Power-down Current ⁽³⁾
Power Supply Current ^(1)(2)(6)
Freq = 1 MHz Icc Op
Freq = 1 MHz Icc Idle
Freq = 6 MHz Icc Op
Freq = 6 MHz Icc Idle
Freq >12 MHz Icc Op
Freq >12 MHz Icc Idle
-0.5
0.2 V_CC + 1.4
0.7 V_CC
2.4
0.75 V_CC
0.9 V_CC
2.4
0.75 V_CC
0.9 V_CC
50
0.2 V_CC - 0.1
V_CC + 0.5
V_CC + 0.5
0.45
0.45
200
-75
±10
-750
10
75
1.8
1
10
4
1.25F + 5
0.36F + 2.7
V
V
V
V I_OL = 1.6 mA⁽⁴⁾
V I_OL = 3.2 mA⁽⁴⁾
V I_OH = -60 µA
V I_OH = -25 µA
V I_OH = -10 µA
V I_OH = -400 µA
V I_OH = -150 µA
V I_OH = -40 µA
kΩ
µA Vin = 0.45V
µA 0.45 V < Vin < V_CC
µA Vin = 2.0V
pF
Fc = 1 MHz
TA = 25°C
µA 2.0V < V_{CC <} 5.5V
mA ^{VCC = 5.5V}
mA
mA
mA
mA
F in MHz
mA
Notes:
1. I_CC under reset is measured with all output pins disconnected; XTAL1 driven with T_CLCH, T_CHCL = 5 ns (see Figure 6), V_IL =
V_SS + 0.5V,
V_IH = V_CC - 0.5V; XTAL2 N.C.; EA = RST = Port 0 = V_CC. I_CC would be slightly higher if a crystal oscillator is used.
2. Idle I_CC is measured with all output pins disconnected; XTAL1 driven with T_CLCH, T_CHCL = 5 ns, V_IL = V_SS + 0.5V, V_IH = V_CC -
0.5V; XTAL2 N.C; Port 0 = V_CC; EA = RST = V_SS (see Figure 4).
3. Power-down I_CC is measured with all output pins disconnected; EA = V_SS, PORT 0 = V_CC; XTAL2 NC.; RST = V_SS (see Fig-
ure 5).
4. Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be superimposed on the V_OLs of ALE and Ports 1
and 3. The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins make 1 to 0
transitions during bus operation. In the worst cases (capacitive loading 100 pF), the noise pulse on the ALE line may exceed
0.45V with maxi V_OL peak 0.6V. The use of a Schmitt Trigger is not necessary.
5. Under steady state (non-transient) conditions, I_OL must be externally limited as follows:
Maximum I_OL per port pin: 10 mA
Maximum I_OL per 8-bit port:
Port 0: 26 mA
Ports 1, 2 and 3: 15 mA
Maximum total I_OL for all output pins: 71 mA
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4149M–AERO–06/03