AIC1573 Datasheet, PDF (1/19 Pages) Analog Intergrations Corporation – 5-bit DAC, Synchronous PWM Power Regulator with Simple PWM Power Regulator, LDO And Linear Controller

AIC1573
5-bit DAC, Synchronous PWM Power
Regulator with Simple PWM Power Regulator,
LDO And Linear Controller
n ^FEATURES
l Compatible with HIP6020.
l Provides 4 Regulated Voltages for Microprocessor
Core, AGP Bus, Memory and GTL Bus Power.
l TTL Compatible 5-bit Digital-to-Analog Core Output
Voltage Selection. Range from 1.3V to 3.5V.
0.1V Steps from 2.1V to 3.5V.
0.05V Steps from 1.3V to 2.05V.
l ±1.0% PWM Output Voltage for VCORE.
l ±3% PWM Output Voltage for AGP Bus.
l ±3.0% Reference Voltage for Chipset and/or Ca-
che Memory and VGTL.
l Simple Voltage-Mode PWM Control with Built in
Internal Compensation Networks.
l N-Channel MOSFET Driver for PWM buck con-
verters.
l Linear Controller Drives Compatible with both N–
Chanel MOSFET and NPN Bipolar Series Pass
Transistor.
l Operates from +3.3V, +5V and +12V Inputs.
l Fast Transient Response.
l Full 0% to 100% Duty Ratios.
l Adjustable Current Limit without External Sense
Resistor.
l Microprocessor Core Voltage Protection against
Upper MOSFET shorted to +5V.
l Power Good Output Voltage Monitor.
l Over-Voltage and Over-Current Fault Monitors.
l 200KHz Free-Running Oscillator Programmable up
to 700KHz.
n ^APPLICATIONS
l Full Motherboard Power Regulation for Computers.
n ^DESCRIPTION
The AIC1573 combines two PWM voltage mode
controllers and two linear controllers as well as the
monitoring and protection functions in this chip. One
PWM controller regulates the microprocessor core
voltage with a synchronous rectified buck converter.
The second PWM controller provides AGP bus 1.5V
or 3.3V power with a standard buck converter. Two
linear controllers regulate power for the 1.5V GTL
bus and 1.8V power for the chip set core voltage
and/or cache memory circuits.
An integrated 5 bit D/A converter that adjusts the
microprocessor core voltage from 2.1V to 3.5V in
0.1V increments and from 1.3V to 2.05V in 0.05V
increments. The second PWM controller for AGP
bus power is selectable by means of SELECT pin
status for 1.5V or 3.3V with 3% accuracy. Two linear
controllers drive with external N-channel MOSFETs
to provide 1.5V±3% and fixed output voltage
1.8V±3%.
This chip monitors all the output voltages. Power
Good signal is issued when the core voltage is
within ±10% of the DAC setting and the other levels
are above their under-voltage levels. Over-voltage
protection for the core output uses the lower N-
channel MOSFET to prevent output voltage above
116% of the DAC setting.
The PWM over-current function monitors the output
current by using the voltage drop across the upper
MOSFET’s R_DS(ON), eliminating the need for a cur-
rent sensing resistor.
Analog Integrations Corporation
www.analog.com.tw
DS-1573-01 Sep 10, 01
TEL: [phone]
4F, 9, Industry E. 9th Rd, Science Based Industrial Park, Hsinchu Taiwan, ROC
FAX: [phone]
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