AIC1571 Datasheet, PDF (1/18 Pages) Analog Intergrations Corporation – 5-bit DAC, Synchronous PWM Power Regulator with Dual Linear Controllers

AIC1571
5-bit DAC, Synchronous PWM Power
Regulator with Dual Linear Controllers
FEATURES
Provides 3 Regulated Voltages for Microproces-
sor Core, Clock and GTL Power.
Simple Voltage-Mode PWM Control.
Dual N-Channel MOSFET Synchronous Driver.
Operates from +3.3V, +5V and +12V Inputs.
Fast Transient Response.
Full 0% to 100% Duty Ratios.
±1.0% Output Voltage for VCORE and ±2.0%
Output Voltage Reference for VCLK and VGTL.
TTL Compatible 5-bit Digital-to-Analog Core Out-
put Voltage Selection. Range from 1.3V to 3.5V.
0.1V Steps from 2.1V to 3.5V.
0.05V Steps from 1.3V to 2.05V.
Adjustable Current Limit without External Sense
Resistor.
Microprocessor Core Voltage Protection against
Shorted MOSFET.
Power Good Output Voltage Monitor.
Over-Voltage and Over-Current Fault Monitors.
200KHz Free-Running Oscillator Programmable
up to 350KHz.
APPLICATIONS
Full Motherboard Power Regulation for Comput-
ers.
Power Integrations for 3 Output Power System.
DESCRIPTION
The AIC1571 combines a synchronous voltage
mode controller with two linear controllers as well
as the monitoring and protection functions in this
chip. The PWM controller regulates the microproc-
essor core voltage with a synchronous rectified
buck converter. One linear controller regulates
power for the GTL bus and the other linear con-
troller provides power for the clock driver circuit or
memory (1.8V)
An integrated 5 bit D/A converter that adjusts the
core PWM output voltage from 2.1V to 3.5V in 0.1V
increments and from 1.3V to 2.05V in 0.05V incre-
ments. The linear regulator uses an internal driver
device to provide 2.5V±2.5%. The linear controller
drives with an external N-channel MOSEFET to
provide 1.5V±2.5%.
This chip monitors all the output voltages. Power
Good signal is issued when the core voltage is
within ±10% of the DAC setting and the other levels
are above their under-voltage levels. Over-voltage
protection for the core output uses the lower N-
channel MOSFET to prevent output voltage above
115% of the DAC setting.
The PWM over-current function monitors the out-
put current by using the voltage drop across the
upper MOSFET’s R_DS(on), eliminating the need for a
current sensing resistor.
Analog Integrations Corporation 4F, 9, Industry E. 9th Rd, Science Based Industrial Park, Hsinchu Taiwan, ROC
DS-1571-00 Oct 9, 00
TEL: [phone] FAX: [phone]
www.analog.com.tw
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