USS-344 Datasheet, PDF (8/54 Pages) Agere Systems – USS-344 QuadraBus Four-Host PCI-to-USB OpenHCL Host Controller

USS-344 QuadraBus
Four-Host PCI-to-USB OpenHCI Host Controller
Advance Data Sheet, Rev. 9
June 2001
Register Overview
Table 6. PCI Bus Configuration Memory Summary (Function 0)
Refer to Tables 10—31 for more details on each of these registers.
Configuration Space Offset
Register Name
Read/Write Default Value (Reset)
00h—01h
02h—03h
04h—05h
06h—07h
08h
09h—0Bh
0Ch
0Dh
0Eh
0Fh
10h—13h
14h—17h
18h—1Bh
1Ch—1Fh
20h—23h
24h—27h
28h—2Bh
2Ch—2Dh
2Eh—2Fh
30h—33h
34h
3Ch
3Dh
3Eh
3Fh
4Ch
Vendor ID
Device ID
Command
Status
Revision ID*
Class Code
Cache Line Size
Latency Timer
Header Type
BIST
BAR 0
BAR 1
BAR 2
BAR 3
BAR 4
BAR 5
CardBus CIS Pointer
Subsystem Vendor ID
Subsystem ID
Expansion ROM Base Address
Capabilities Pointer
Interrupt Line
Interrupt Pin
Min_Gnt
Max_Lat
Special—Subsystem Write Capability
R
R
R/W
R/W
R
R
R
R/W
R
R
R/W
R
R
R
R
R
R
R/W^†
R/W^†
R
R
R/W
R
R
R
R/W
11C1h
5803h
0000h
TEST1 = 0b: 0210h
TEST1 = 1b: 0200h
10h
0C0310h
00h
00h
80h
00h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
00000000h
11C1h
5803h
00000000h
TEST1 = 0b: 50h
TEST1 = 1b: 00h
00h
01h
03h
56h
00000000h
* The revision can be identified electronically using the standard PCI Revision ID register described in this table. The revision can also be iden-
tified by physical markings using the last letter of the USS-344 identifier code printed on the device. The USS-344 identifier code will be
printed using the format USS344XY, where X will identify the package type (T) and Y will identify the revision.
† This register is normally read only. Write capability of this register is available to system BIOS only.
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