LCK4801 Datasheet, PDF (4/10 Pages) Agere Systems – Low-Voltage HSTL Differential Clock

LCK4801
Low-Voltage HSTL Differential Clock
Preliminary Data Sheet
July 2001
Pin Information (continued)
Table 2. Frequency Selection
Selection
4
3
2
1
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
0
1
1
0
0
1
0
0
0
0
1
0
1
0
0
1
1
0
0
0
1
1
1
0
1
0
0
0
0
1
0
0
1
0
1
0
1
0
0
1
0
1
1
0
1
1
0
0
0
1
1
0
1
0
1
1
1
0
0
1
1
1
1
1
0
0
0
0
1
0
0
0
1
1
0
0
1
0
1
0
0
1
1
1
0
1
0
0
1
0
1
0
1
1
0
1
1
0
1
0
1
1
1
1
1
0
0
0
1
1
0
0
1
1
1
0
1
0
1
1
0
1
1
1
1
1
0
0
1
1
1
0
1
1
1
1
1
0
1
1
1
1
1
Input
Divide
M
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
Feedback
Divide
N
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
PCLK (MHz)
for Given Input Frequency (MHz)
70
100
120
125
336
480
576
600
350
500
600
625
364
520
624
650
378
540
648
675
392
560
672
700
406
580
696
725
420
600
720
750
434
620
744
775
448
640
768
800
462
660
792
825
476
680
816
850
490
700
840
875
504
720
864
900
518
740
888
925
532
760
912
950
546
780
936
975
560
800
960
1000
564
820
984
NA
588
840
NA
NA
602
860
NA
NA
616
880
NA
NA
630
900
NA
NA
644
920
NA
NA
658
940
NA
NA
672
960
NA
NA
686
980
NA
NA
700
1000
NA
NA
714
NA
NA
NA
728
NA
NA
NA
742
NA
NA
NA
756
NA
NA
NA
770
NA
NA
NA
4
Agere Systems Inc.