CT2500 Datasheet, PDF (4/10 Pages) Aeroflex Circuit Technology – CT2500 MIL-STD-1397 Type D & E Low Level Serial Interface Protocol Chip

I/O FUNCTION LISTING (Continued)
NAME
I/O
DESCRIPTION
RCVCNTRL O Received Control Bar
Pulses low upon reception of a Control Frame in both Sink and Source modes.
RCVDTA
O Received Data/Command Word Bar
Pulses low upon reception of a Data or Command word
ERR1, ERR2 O Error Bit One and Error Bit Two
ERR1
0
ERR2
0
No Error
0
1
Bit Count Error in Received Data/Command word or Control Frame
1
0
Parity Error in Received Data
1
1
Sync Error in Received Data/Command word or Control Frame
OVRFLOW
RSTERR
POR
WIOUT
WIIN
CMDOUT
DTAOUT
LDCNTRL
FIFOEN
O Overflow Error
"1" = Overflow occurred in the Received Data Latch. Data not read in time.
I Reset Error Flags Bar (Internal Pullup)
A low pulse on this line resets the ERR1, ERR2 and OVRFLOW error flags.
I Power on Reset Bar
A Master reset. A low pulse on this line resets the internal sequences and error flags.
It does not reset the I/O Data latches.
I Word Identifier Bit Out
The value on this line is latched during STR2 for the WI bit position in the word to be
transmitted. A "0" indicates a Data word and a "1" indicates a Command/Interrupt
word.
O Word Identifier Bit In
The WI bit of the received word is present on this line during RCVDTA and indicates
whether the word is a Data word or a Command/Interrupt word. The value is latched at
the first RCVDTA for an entire Burst Mode reception.
I Command Out
Third bit of the transmitted Control Frame.
I Data Out
Second bit of the transmitted Control Frame.
I Load Control Frame Bar
This loads the status of CMDOUT, DTAOUT and BIT4OUT into the Control Frame to
be transmitted. Transmission will commence when the loading is completed. This
applies to both Sink and Source modes.
I FIFO Enable
Source Mode: When FIFOEN is held high ("1"), FIFORD’s (FIFO Read Bars) will be
generated when the input data latch is empty (RDYFORDTA = 1). During the FIFORD,
data presented to the parallel bus will be loaded into the input data latch and
transmitted when ready. In a non-burst (single word) condition, FIFOEN must be
removed before RDYFORDTA comes back. A positive pulse of 100 ns duration
satisfies this requirement.
Sink Mode: The parallel data bus goes active during RCVDTA and will hold for
approximately 25 ns after its rising edge. With a FIFO directly connected to the data
bus, RCVDTA can be used to load all received words into the FIFO. Gating RCVDTA
with WIIN selects only the data words for loading.
Aeroflex Circuit Technology
4
SCDCT2500 REV A 6/12/98 Plainview NY [phone]