ACTRS128K32 Datasheet, PDF (4/8 Pages) Aeroflex Circuit Technology – RAD Tolerant ACT-RS128K32 High Speed 4 Megabit SRAM Multichip Module

Timing Diagrams
Read Cycle Timing Diagrams
Read Cycle 1 (CE = OE = VIL, WE = VIH)
A0-16
DI/O
tRC
tAA
tOH
Previous Data Valid
Data Valid
Read Cycle 2 (WE = VIH)
tRC
A0-16
tAA
CE
tACE
tCLZ
SEE NOTE
OE
tOE
tOLZ
SEE NOTE
DI/O
High Z
tCHZ
SEE NOTE
tOHZ
SEE NOTE
Data Valid
Write Cycle Timing Diagrams
Write Cycle 1 (WE Controlled, OE = VIL)
tWC
A0-16
tAW
tAH
tCW
CE
tAS
tWP
WE
tWHZ
SEE NOTE
tOW
SEE NOTE
tDW
tDH
DI/O
Data Valid
Write Cycle 2 (CE Controlled, OE = VIH )
tWC
A0-16
CE
tAW
tAH
tAS
tCW
tWP
WE
tDW
tDH
DI/O
Data Valid
UNDEFINED
DON’T CARE
Note: Guaranteed by design, but not tested.
Note: Guaranteed by design, but not tested.
AC Test Circuit
Current Source
IOL
Parameter
Typical Units
To Device Under Test
CL =
50 pF
VZ ~ 1.5 V (Bipolar Supply)
Input Pulse Level
0 – 3.0
V
Input Rise and Fall
5
ns
Input and Output Timing Reference Level
1.5
V
IOH
Output Lead Capacitance
50
pF
Notes:
Current Source
1) VZ is programmable from -2V to +7V. 2) IOL and IOH programmable from 0 to 16 mA. 3) Tester Impedance
ZO = 75Ω. 4) VZ is typically the midpoint of VOH and VOL. 5) IOL and IOH are adjusted to simulate a typical resistance
load circuit. 6) ATE Tester includes jig capacitance.
Aeroflex Circuit Technology ACT-RS128K32
4
SCD3659 REV 3 12/17/98 Plainview NY [phone]