CT2565 Datasheet, PDF (26/31 Pages) Aeroflex Circuit Technology – CT2565 Bus Controller, Remote Terminal and BUS Monitor FOR MIL-STD-1553B

Table 9A – Pin Function Table (78 Pin DDIP) (continued)
Pin #
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
Symbol
Description
MSGERR Output signal which indicates an error occurred during the current message
sequence.
TXDATA A
RXDATA A
Bipolar serial data output to positive input of bus transceiver.
Bipolar serial input from negative output of bus transceiver.
RTADP
RTAD1
Parity bit input for RT address.
Bit 1 of RT address input.
RTAD3 Bit 3 of RT address input.
RESET
TXDATA B
System reset input - resets all inputs in module.
Bipolar serial data output to negative input bus transceiver.
RXDATA B Bipolar serial data input from positive output of bus transceiver.
12MHz
GROUND
12MHz TTL clock input.
Signal ground.
BCSTART Cycle enable input Logic "0" initiates bus controller message transfer operation.
NBGRNT
BITEN
New bus grant output from RT indicates beginning of message transfer sequence.
Built in Test enable output indicates RT is transferring BlT word on internal 16 bit bus.
WR
Write enable output for control of subsystem memory.
BUSGRNT Bus request input in response to DTREQ. Allows BC/RT to transfer data to
subsystem.
LOOPERR Loop error output. Logic "0" indicates failure of loop back transmitted data.
SSBUSY Subsystem busy input for RT status word.
ILLCMD Illegal command input to RT, used to block RT response to an illegal command.
ADRINC
CHASSIS
Increment output pulse. Goes LOW at the completion of each word transfer to/from
subsystem. Can increment external address counter.
Frame ground electricity isolated from signal ground
WC0
LSB of current command word count field.
WC2
WC4
Bit 2 of word count field.
Bit 4 of word count field.
TXINH A Transmitter inhibit output signal for Channel A.
LMC
Latched Mode Command. Logic "1" indicates current word command is a mode code
word, WC0-WC4.
TESTIN Factory test point. Do not connect.
EOM
BUFENA
End of message output. Logic "0" occurs when BC/RT message is completed.
Buffer enable input, may be driven LOW by STATEN or BITEN if subsystem must read
bit or Status words. Enables internal 16 bit bus onto subsystem bus.
Aeroflex Circuit Technology
26
SCDCT2565 REV B 8/10/99 Plainview NY [phone]