UT8R128K32 Datasheet, PDF (12/22 Pages) Aeroflex Circuit Technology – UT8R128K32 128K x 32 SRAM

DATA RETENTION CHARACTERISTICS (Pre and Post-Radiation)^*
(V_DD2 = V_DD2 (min), 1 Sec DR Pulse)
SYMBOL
PARAMETER
TEMP
MINIMUM MAXIMUM
V_DR
V_DD1 for data retention
--
1.0
--
I_DDR ¹
Data retention current
-40°C
--
600
-55°C
--
600
25°C
--
600
125°C
--
12
t_EFR1,2
Chip deselect to data retention time
--
0
--
Notes: ^tR1,2
Operation recovery time
--
t_AVAV
--
* For devices procured with a total ionizing dose tolerance guarantee, the post-irradiation performance is guaranteed at 25×C per MIL-STD-883
Method 1019, Condition A up to the maximum TID level procured.
1. E1 = V_DD2 or E2 = V_SS all other inputs = V_DD2 or V_SS
2. V_DD2 = 0 volts to V_DD2 (max)
UNIT
V
μA
μA
μA
mA
ns
ns
V_DD1
1.7V
DATA RETENTION MODE
V_DR > 1.0V
1.7V
V_IN >0.7V_DD2 CMOS
E2
E1
V_IN <0.3V_DD2 CMOS
t_EFR
t_R
V_SS
V_DD2
Figure 5. Low V_DD Data Retention Waveform
VDD2
DUT
Zo = 50-ohms
VDD2
RTERM
100-ohms
CL =
50pF
RTERM
100-ohms
Test
Point
CMOS
V_DD2-0.05V
0.0V
< 2ns
Notes:
1. Measurement of data output occurs at the low to high or high to low transition mid-point
(i.e., CMOS input = V_DD2/2).
Input Pulses
Figure 6. AC Test Load and Input Waveforms
90%
< 2ns
10%
12