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| UT8CR512K32 Datasheet, PDF (10/16 Pages) Aeroflex Circuit Technology – UT8CR512K32 16 Megabit SRAM | |||
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A(18:0)
tAVET
En
tETEF
tEFAX
or
tAVET
En
tETEF
tEFAX
Wn
tWLEF
Dn(7:0)
Qn(7:0)
tWLQZ
APPLIED DATA
tDVEF
tEFDX
Assumptions & Notes:
1. G < VIL (max). If G > VIH (min) then Qn(7:0) will be in three-state for the entire cycle.
2. Either En scenario above can occur.
Figure 4b. SRAM Write Cycle 2: Chip Enable - Controlled Access
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