UT54ACS86 Datasheet, PDF (1/9 Pages) Aeroflex Circuit Technology – Quadruple 2-Input Exclusive OR Gates

Standard Products
UT54ACS86/UT54ACTS86
Quadruple 2-Input Exclusive OR Gates
Datasheet
November 2010
www.aeroflex.com/logic
FEATURES
‰ 1.2μ CMOS
- Latchup immune
‰ High speed
‰ Low power consumption
‰ Single 5 volt supply
‰ Available QML Q or V processes
‰ Flexible package
- 14-pin DIP
- 14-lead flatpack
‰ UT54ACS86 - SMD 5962-96538
‰ UT54ACTS86 - SMD 5962-96539
PINOUTS
14-Pin DIP
Top View
A1
1
14
V_DD
B1 ^{2 13} B4
Y1 ^{3 12} A4
A2 ^{4 11} Y4
B2 ^{5 10} B3
Y2 ⁶
9 _A3
V_SS
7
8 _Y3
DESCRIPTION
The UT54ACS86 and the UT54ACTS86 are quadruple 2-input
exclusive OR gates. The devices perform the Boolean function
Y = A⊕B = AB + AB in positive logic.
An application is as a true/complement element. If one of the
inputs is low, the other input will be reproduced in true form at
the output. If one of the inputs is high, the signal on the other
input will be reproduced inverted at the output.
The devices are characterized over full military temperature
range of -55°C to +125°C.
14-Lead Flatpack
Top View
A1
1 14
V_DD
B1
2 13
B4
Y1
3 12
A4
A2
4 11
Y4
B2
5 10
B3
Y2
6
9
A3
V_SS
7
8
Y3
FUNCTION TABLE
LOGIC DIAGRAM
INPUTS
A
B
L
L
L
H
H
L
H
H
OUTPUT
Y
L
H
H
L
A1
Y1
B1
A2
B2
Y2
A3
B3
Y3
LOGIC SYMBOL
(1)
A1
(2)
B1
(4)
A2
(5)
B2
(9)
A3
(10)
B3
(12)
A4
(13)
B4
=1
(3)
Y1
(6)
Y2
(8)
Y3
(11)
Y4
A4
B4
Y4
Note:
1
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC
Publication 617-12.