UT54ACS273 Datasheet, PDF (1/10 Pages) Aeroflex Circuit Technology – Octal D-Flip-Flops with Clear

Standard Products
UT54ACS273/UT54ACTS273
Octal D-Flip-Flops with Clear
Datasheet
December 16, 2011
www.aeroflex.com/logic
FEATURES
 Contains eight flip-flops with single-rail outputs
 Buffered clock and direct clear inputs
 Individual data input to each flip-flop
 Applications include:
- Buffer/storage registers, shift registers, and pattern
generators
 CMOS
- Latchup immune
 High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 20-pin DIP
- 20-lead flatpack
UT54ACS273 - SMD 5962-96578
UT54ACTS273 - SMD 5962-96579
DESCRIPTION
The UT54ACS273 and the UT54ACTS273 are positive-edge-
triggered D-type flip-flops with a direct clear input.
Information at the D inputs meeting the setup time requirements
is transferred to the Q outputs on the positive-going edge of the
clock pulse. When the clock input is at either the high or low
level, the D input signal has no effect at the output.
The devices are characterized over full military temperature
range of -55C to +125C.
FUNCTION TABLE
INPUTS
OUTPUTS
CLR
CLK
D_x
Q_x
L
X
X
L
H

H
H
H

L
L
H
L
X
No change
PINOUTS
20-Pin DIP
Top View
CLR
1Q
1D
2D
2Q
3Q
3D
4D
4Q
V_SS
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 ₁₁
V_DD
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLK
20-Lead Flatpack
Top View
CLR
1Q
1D
2D
2Q
3Q
3D
4D
4Q
V_SS
LOGIC SYMBOL
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
V_DD
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLK
(1)
CLR
R
(11)
CLK
C1
1D ⁽³⁾
(4)
1D
2D
3D ⁽⁷⁾
(8)
4D
5D ⁽¹³⁾
6D ⁽¹⁴⁾
7D ⁽¹⁷⁾
(18)
8D
(2)
1Q
(5)
2Q
(6)
3Q
(9)
4Q
(12)
5Q
(15)
6Q
(16)
7Q
(19)
8Q
1 Note:
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984
and IEC Publication 617-12.