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| UT54ACS193 Datasheet, PDF (1/10 Pages) Aeroflex Circuit Technology – Synchronous 4-Bit Up-Down Dual Clock Counters | |||
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Standard Products
UT54ACS193/UT54ACTS193
Synchronous 4-Bit Up-Down Dual Clock Counters
Datasheet
November 2010
www.aeroflex.com/logic
FEATURES
 Look-ahead circuitry enhances cascaded counters
 Fully synchronous in count modes
 Parallel asynchronous load for modulo-N count lengths
 Asynchronous clear
 1.2μ CMOS (ACTS193) and .6μm CRH CMOS process
(ACS193)
- Latchup immune
 High speed
 Low power consumption
 Single 5 volt supply
 Available QML Q or V processes
 Flexible package
- 16-pin DIP
- 16-lead flatpack
 UT54ACS193 - SMD 5962-96566
 UT54ACTS193 - SMD 5962-96567
DESCRIPTION
The UT54ACS193 and the UT54ACTS193 are synchronous 4-
bit, binary reversible up-down binary counters. Synchronous
operation is provided by having all flip-flops clocked
simultaneously so that the outputs change coincident with each
other when instructed. Synchronous operation eliminates the
output counting spikes normally associated with asynchronous
counters.
The outputs of the four flip-flops are triggered on a low-to-high-
level transition of either count input (Up or Down). The direc-
tion of the counting is determined by which count input is pulsed
while the other count input is high.
The counters are fully programmable. The outputs may be preset
to either level by placing a low on the load input and entering
the desired data at the data inputs. The output will change to
agree with the data inputs independently of the count pulses.
Asynchronous loading allows the counters to be used as modulo-
N dividers by simply modifying the count length with the preset
inputs.
A clear input has been provided that forces all outputs to the low
level when a high level is applied. The clear function is inde-
pendent of the count and the load inputs.
The counter is designed for efficient cascading without the need
for external circuitry. The borrow output (BO) produces a low-
level pulse while the count is zero and the down input is low.
Similarly, the carry output (CO) produces a low-level pulse
while the count is maximum
PINOUTS
16-Pin DIP
Top View
B
QB
QA
DOWN
UP
QC
QD
VSS
B 1 16 VDD
QB 2 15 A
QA 3 14 CLR
DOWN 4 13 BO
UP 5 12 CO
QC 6 11 LOAD
QD 7 10 C
VSS
8
9D
16-Lead Flatpack
Top View
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8
9
VDD
A
CLR
BO
CO
LOAD
C
D
FUNCTION TABLE
FUNCTION
CLOCK
UP
CLOCK
DOWN
CLR
Count Up
â
H
L
Count Down
H
â
L
Reset
X
X
H
Load Preset
X
X
L
Input
LOAD
H
H
X
L
1
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