English
Language : 

UT54ACS162245SLV Datasheet, PDF (1/13 Pages) Aeroflex Circuit Technology – Schmitt CMOS 16-bit Bidirectional MultiPurpose Low Voltage Transceiver
UT54ACS162245SLV
Schmitt CMOS 16-bit Bidirectional MultiPurpose
Low Voltage Transceiver
Datasheet
September, 2014
FEATURES
• Voltage translation
- 3.3V bus to 2.5V bus
- 2.5V bus to 3.3V bus
• Cold sparing all pins
• 0.25μ CMOS
• Operational environment
- Total dose: 300Krad(Si) and 1Mrad(Si)
- Single Event Latchup immune
• High speed, low power consumption
• Schmitt trigger inputs to filter noisy signals
• Cold and Warm Spare - all outputs
• Available QML Q or V processes
• Standard Microcircuit Drawing 5962-02543
• Package:
- 48-lead flatpack, 25 mil pitch (.390 x .640), wgt 1.4 Grams
DESCRIPTION
The 16-bit wide UT54ACS162245SLV MultiPurpose low volt-
age transceiver is built using Aeroflex’s epitaxial CMOS tech-
nology and is ideal for space applications. This high speed, low
power UT54ACS162245SLV low voltage transceiver is de-
signed to perform multiple functions including: asynchronous
two-way communication, Schmitt input buffering, voltage trans-
lation, warm and cold sparing. With VDD equal to zero volts, the
UT54ACS162245SLV outputs and inputs present a minimum
impedance of 1MΩ making it ideal for "cold spare" applications.
Balanced outputs and low "on" output impedance make the
UT54ACS162245SLV well suited for driving high capacitance
loads and low impedance backplanes. The
UT54ACS162245SLV enables system designers to interface 2.5
volt CMOS compatible components with 3.3 volt CMOS com-
ponents. For voltage translation, the A port interfaces with the
2.5 volt bus; the B port interfaces with the 3.3 volt bus. The
direction control (DIRx) controls the direction of data flow. The
output enable (OEx) overrides the direction control and disables
both ports. These signals can be driven from either port A or B.
The direction and output enable controls operate these devices
as either two independent 8-bit transceivers or one 16-bit trans-
ceiver.
LOGIC SYMBOL
OE1 (48)
OE2 (25)
(1)
DIR1
G1
G2
2EN1 (BA)
2EN2 (AB)
1EN1 (BA)
1EN2 (AB)
(47)
1A1
(46)
1A2
(44)
1A3
(43)
1A4
(41)
1A5
(40)
1A6
(38)
1A7
(37)
1A8
(36)
2A1
(35)
2A2
(33)
2A3
(32)
2A4
(30)
2A5
(29)
2A6
(27)
2A7
(26)
2A8
11
12
21
22
(24)
DIR2
(2)
1B1
(3)
1B2
(5)
1B3
(6)
1B4
(8)
1B5
(9)
(11)
1B6
1B7
(12)
(13) 1B8
2B1
(14)
2B2
(16)
2B3
(17)
2B4
(19)
2B5
(20)
(22)
2B6
2B7
(23)
2B8
PIN DESCRIPTION
Pin Names
Description
OEx
Output Enable Input (Active Low)
DIRx
Direction Control Inputs
xAx
Side A Inputs or 3-State Outputs (2.5V Port)
xBx
Side B Inputs or 3-State Outputs (3.3V Port)
1