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UT54ACS138 Datasheet, PDF (1/10 Pages) Aeroflex Circuit Technology – 3-Line to 8-Line Decoders/Demultiplexers
Standard Products
UT54ACS138/UT54ACTS138
3-Line to 8-Line Decoders/Demultiplexers
Datasheet
November 2010
www.aeroflex.com/logic
FEATURES
‰ 1.2μ CMOS
- Latchup immune
‰ High speed
‰ Low power consumption
‰ Single 5 volt supply
‰ Available QML Q or V processes
‰ Flexible package
- 16-pin DIP
- 16-lead flatpack
‰ UT54ACS138 - SMD 5962-96544
‰ UT54ACTS138 - SMD 5962-96545
DESCRIPTION
The UT54ACS138 and the UT54ACTS138 3-line to 8-line de-
coders/demultiplexers are designed to be used in high-perfor-
mance memory-decoding or data-routing applications requiring
very short propagation delay times.
The conditions at the binary select inputs and the three enable
inputs select one of eight output lines. Two active-low and one
active-high enable inputs reduce the need for external gates of
inverters when expanding. A 24-line decoder can be implement-
ed without external inverters and a 32-line decoder requires only
one inverter. An enable input can be used as a data input for
demultiplexing applications.
PINOUTS
A
B
C
G2A
G2B
G1
Y7
VSS
The devices are characterized over full military temperature
range of -55°C to +125°C.
FUNCTION TABLE
ENABLE INPUTS
G1
G2A
G2B
X
X
H
L
X
X
X
H
X
H
L
L
H
L
L
H
L
L
H
L
L
H
L
L
H
L
L
H
L
L
H
L
L
SELECT INPUTS
C
B
A
X
X
X
X
X
X
X
X
X
L
L
L
L
L
H
L
H
L
L
H
H
H
L
L
H
L
H
H
H
L
H
H
H
Y0
Y1
Y2
H
H
H
H
H
H
H
H
H
L
H
H
H
L
H
H
H
L
H
H
H
H
H
H
H
H
H
H
1H
H
H
H
H
16-Pin DIP
Top View
A
1
16
VDD
B 2 15 Y0
C 3 14 Y1
G2A 4 13 Y2
G2B 5 12 Y3
G1 6 11 Y4
Y7 7 10 Y5
VSS
8
9 Y6
16-Lead Flatpack
Top View
1 16
VDD
2 15
Y0
3 14
Y1
4 13
Y2
5 12
Y3
6 11
Y4
7 10
Y5
8
9
Y6
OUTPUT
Y3
Y4
Y5
Y6
Y7
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
L
H
H
H
H
H
L
H
H
H
H
H
L
H
H
H
H
H
L