APT50M75LFLLG Datasheet, PDF (4/5 Pages) Advanced Power Technology – POWER MOS 7 FREDFET

228
100
OPERATION HERE
LIMITED BY R_DS (ON)
100µS
10
1mS
TC =+25°C
TJ =+150°C
SINGLE PULSE
1
1
10
100
500
V_DS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 10, MAXIMUM SAFE OPERATING AREA
16
I_D = 57A
VDS=100V
VDS=250V
12
10mS
VDS=400V
8
4
0
0
40
80
120 160
200
Q_g, TOTAL GATE CHARGE (nC)
FIGURE 12, GATE CHARGE vs GATE-TO-SOURCE VOLTAGE
100
90
80
t_d(off)
70 _{VDD = 333V}
60 ^RG ^{= 5Ω}
T_J = 125°C
50 _{L = 100µH}
40
30
20
t_d(on)
10
1
10 20 30 40 50 60 70 80 90
I_D (A)
FIGURE 14, DELAY TIMES vs CURRENT
2500
V_DD = 333V
R_G = 5Ω
2000
T_J = 125°C
L = 100µH
E_ON includes
E_on
diode reverse recovery
1500
1000
500
E_off
0
10 20 30 40 50 60 70 80 90
I_D (A)
FIGURE 16, SWITCHING ENERGY vs CURRENT
20,000
10,000
1,000
APT50M75B2FLL_LFLL
Ciss
Coss
100
Crss
10
0
10
20
30
40
50
V_DS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 11,CAPACITANCE vs DRAIN-TO-SOURCE VOLTAGE
200
100
TJ =+150°C
10
TJ =+25°C
1
0.3
0.6
0.9
1.2
1.5
V_SD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
FIGURE 13, SOURCE-DRAIN DIODE FORWARD VOLTAGE
120
V_DD = 333V
110 R_G = 5Ω
100 ^T_J ^{= 125°C}
90 ^{L = 100µH}
80
t_f
70
60
50
t_r
40
30
20
10
10 20 30 40 50 60 70 80 90
I_D (A)
FIGURE 15, RISE AND FALL TIMES vs CURRENT
3500
V_DD = 333V
3000 ^{ID = 57A}
T_J = 125°C
E_off
L = 100µH
2500 E_ON includes
diode reverse recovery
2000
E_on
1500
1000
500
0
0 5 10 15 20 25 30 35 40 45 50
R_G, GATE RESISTANCE (Ohms)
FIGURE 17, SWITCHING ENERGY VS. GATE RESISTANCE