APT5018BFLL_03 Datasheet, PDF (4/5 Pages) Advanced Power Technology – POWER MOS 7 FREDFET

108
OPERATION HERE
LIMITED BY R_DS (ON)
10
100µS
TC =+25°C
TJ =+150°C
SINGLE PULSE
1
1
5 10
50 100
500
V_DS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 10, MAXIMUM SAFE OPERATING AREA
16
I_DID==2277AA
14
VVDDSS==110000VV
12
VDS=250V
VDS=400V
10
1mS
10mS
8
6
4
2
0
0
20
40
60
80
100
Q_g, TOTAL GATE CHARGE (nC)
FIGURE 12, GATE CHARGES vs GATE-TO-SOURCE VOLTAGE
50
t_d(off)
40
V_DD = 333V
30 ^RG ^{= 5Ω}
T_J = 125°C
L = 100µH
20
10
t_d(on)
0
0
10
20
30
40
50
I_D (A)
FIGURE 14, DELAY TIMES vs CURRENT
700
600
500
V_DD = 333V
R_G = 5Ω
T_J = 125°C
L = 100µH
E_ON includes
diode reverse recovery.
E_on
400
300
200
E_off
100
0
0
10
20
30
40
50
I_D (A)
FIGURE 16, SWITCHING ENERGY vs CURRENT
20,000
10,000
1,000
APT5018BFLL-SFLL
Ciss
Coss
100
Crss
10
0
10
20
30
40
50
V_DS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 11,CAPACITANCE vs DRAIN-TO-SOURCE VOLTAGE
200
100
50
TJ =+150°C
TJ =+25°C
10
5
1
0.3 0.5 0.7 0.9 1.1 1.3 1.5
V_SD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
FIGURE 13, SOURCE-DRAIN DIODE FORWARD VOLTAGE
60
V_DD = 333V
R_G = 5Ω
50 _{TJ = 125°C}
L = 100µH
40
30
t_f
20
t_r
10
0
0
10
20
30
40
50
I_D (A)
FIGURE 15, RISE AND FALL TIMES vs CURRENT
800
V_DD = 333V
700 ^ID ^{= 27A}
E_off
T_J = 125°C
600
500
L = 100µH
E_ON includes
diode reverse recovery.
400
E_on
300
200
100
0
0 5 10 15 20 25 30 35 40 45 50
R_G, GATE RESISTANCE (Ohms)
FIGURE 17, SWITCHING ENERGY VS. GATE RESISTANCE