APT5017SVR Datasheet, PDF (4/4 Pages) Advanced Power Technology – Power MOS V is a new generation of high voltage N-Channel enhancement mode power MOSFETs.

200
100
50
OPERATION HERE
LIMITED BY R_DS (ON)
10µS
100µS
10
1mS
5
10mS
1
.5
TC =+25°C
TJ =+150°C
SINGLE PULSE
100mS
DC
.1
1
5 10
50 100
500
V_DS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 10, MAXIMUM SAFE OPERATING AREA
20
I_D = I_D [Cont.]
VDS=100V
16
VDS=250V
12
VDS=400V
8
4
0
0 50 100 150 200 250 300 350
Q_g, TOTAL GATE CHARGE (nC)
FIGURE 12, GATE CHARGES vs GATE-TO-SOURCE VOLTAGE
20,000
10,000
5,000
1,000
500
APT5017SVR
Ciss
Coss
Crss
100
.01
.1
1
10
50
V_DS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 11, TYPICAL CAPACITANCE vs DRAIN-TO-SOURCE VOLTAGE
300
100
50
TJ =+150°C TJ =+25°C
10
5
1
0
0.4
0.8
1.2
1.6
2.0
V_SD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
FIGURE 13, TYPICAL SOURCE-DRAIN DIODE FORWARD VOLTAGE
4.98 (.196)
5.08 (.200)
1.47 (.058)
1.57 (.062)
D³PAK Package Outline
15.95 (.628)
16.05 (.632)
1.04 (.041)
1.15 (.045)
13.41 (.528)
13.51 (.532)
0.46
0.56
(.018)
(.022)
{3
Plcs}
0.020 (.001)
0.178 (.007)
2.67 (.105)
2.84 (.112)
1.22 (.048)
1.32 (.052)
Revised
4/18/95
13.79 (.543)
13.99 (.551)
1.27 (.050)
1.40 (.055)
1.98 (.078)
2.08 (.082)
5.45 (.215) BSC
{2 Plcs.}
Revised
8/29/97
11.51 (.453)
11.61 (.457)
3.81 (.150)
4.06 (.160)
(Base of Lead)
Heat Sink (Drain)
and Leads
are Plated
Source
Drain
Gate
Dimensions in Millimeters (Inches)
APT's devices are covered by one or more of the following U.S.patents: 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336
5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058