104-DIO-48S Datasheet, PDF (2/2 Pages) ADL Embedded Solutions – 48 lines of digital I/O with change of state detection

104-DIO-48S &
104-DIO-24S
Block Diagram & Pin Configuration
48 or 24 Lines of
PC/104 DIGITAL I/O WITH COS
I/O Header
Port C Hi PC7 01
Port C Hi PC6 03
Port C Hi PC5 05
Port C Hi PC4 07
Port C Lo PC3 09
Port C Lo PC2 11
Port C Lo PC1 13
Port C Lo PC0 15
Port B PB7 17
Port B PB6 19
Port B PB5 21
Port B PB4 23
Port B PB3 25
Port B PB2 27
Port B PB1 29
Port B PB0 31
Port A PA7 33
Port A PA6 35
Port A PA5 37
Port A PA4 39
Port A PA3 41
Port A PA2 43
Port A PA1 45
Port A PA0 47
+5 VDC 49
02 GND
04 GND
06 GND
08 GND
10 GND
12 GND
14 GND
16 GND
18 GND
20 GND
22 GND
24 GND
26 GND
28 GND
30 GND
32 GND
34 GND
36 GND
38 GND
40 GND
42 GND
44 GND
46 GND
48 GND
50 GND
CTR/Timer
Clock 0 Input 01
Output 0 03
Gate 1 Input 05
Clock 2 Input 07
Output 2 09
02 Gate 0 Input
04 1MHz Clock (out)
06 Output 1
08 Gate 2 Input
10 Ground
Specifications
Digital I/O
Chip
82C55A (each supports 24 lines)
Number of I/O lines
Direction
48 or 24 TTL/CMOS compatible
Programmable as inputs or outputs in two groups
of 4 and 8 per 82C55A
Sink and source current
Pullup resistors
Change of state detection
(COS)
Throughput
Power output
64mA and 32mA respectively
10K all input lines with optional pull-downs
Port by port selectable on rising and falling edge
Up to 1 Megabyte per second
Re-settable fused +5V at 500mA per 50-pin connector
Interrupts
Number of interrupts
Interrupt requests
Interrupt sources
11
IRQ's 3-7, 9-12, 14, 15
Counter/timer outputs, external interrupt input, or DIO
lines with change of state detection enabled by software
Ordering Guide
104-DIO-48S
104-DIO-24S
48 lines of digital I/O with change of state detection
24 lines of digital I/O with change-of-state detection
Counter/Timers
Chip
Type 82C54
Counter/timers
3 x 16 bit
Maximum input frequency 10MHz
On-board time-base
1MHz
Signal type
TTL
Input voltage
Logic low: -0.5V min, 0.8V max;
Logic high: 2.0V min, 5.0V max
Output voltage
Logic low: 0.0V min, 0.4V max;
Logic high: 3.0V min, 5.0V max
General
Power required
Operating temperature
Storage temperature
Operating humidity
+5V at 50mA typical, all outputs open
0 to 70°C, optional -40 to +85°C, all versions
-50 to 120°C
5% to 95% RH, non-condensing
© Copyright 2006 Advanced Digital Logic, Inc.
Advanced Digital Logic, Inc. 4411 Morena Blvd. Suite 101 San Diego, CA 92117
Email: [e-mail] Website: www.adlogic-pc104.com
Tel: [phone] Fax: [phone]
Specifications subject to change without notice.