AD7770 Datasheet, PDF (91/94 Pages) Analog Devices – 8-Channel, 24-Bit, Simultaneous Sampling ADC

Data Sheet
Table 136. Bit Descriptions for STATUS_REG_1
Bits Bit Name
Settings Description
[7:6] RESERVED
Reserved
5
CHIP_ERROR
Set this bit high if any error bit is high
4
ERR_LOC_CH4
An error specific to CH4_ERR_REG is active
3
ERR_LOC_CH3
An error specific to CH3_ERR_REG is active
2
ERR_LOC_CH2
An error specific to CH2_ERR_REG is active
1
ERR_LOC_CH1
An error specific to CH1_ERR_REG is active
0
ERR_LOC_CH0
An error specific to CH0_ERR_REG is active
ERROR STATUS REGISTER 2
Address: 0x05E, Reset: 0x00, Name: STATUS_REG_2
76543210
00000000
[7:6] RESERVED
[5] CHIP_ERROR (R)
Set high if any error bit is high
[4] ERR_LOC_GEN2 (R)
An error specific to GEN_ERR_REG_2
is active
[3] ERR_LOC_GEN1 (R)
An error specific to GEN_ERR_REG_1
is active
[0] ERR_LOC_CH5 (R)
An error specific to CH5_ERR_REG
is active
[1] ERR_LOC_CH6 (R)
An error specific to CH6_ERR_REG
is active
[2] ERR_LOC_CH7 (R)
An error specific to CH7_ERR_REG
is active
Table 137. Bit Descriptions for STATUS_REG_2
Bits Bit Name
Settings Description
[7:6] RESERVED
Reserved
5
CHIP_ERROR
Set high if any error bit is high
4
ERR_LOC_GEN2
An error specific to GEN_ERR_REG_2 is active
3
ERR_LOC_GEN1
An error specific to GEN_ERR_REG_1 is active
2
ERR_LOC_CH7
An error specific to CH7_ERR_REG is active
1
ERR_LOC_CH6
An error specific to CH6_ERR_REG is active
0
ERR_LOC_CH5
An error specific to CH5_ERR_REG is active
ERROR STATUS REGISTER 3
Address: 0x05F, Reset: 0x00, Name: STATUS_REG_3
76543210
00000000
[7:6] RESERVED
[5] CHIP_ERROR (R)
Set high if any error bit is high
[4] INIT_COMPLETE (R)
Fuse initialization is com plete. Device
is ready to receive com m ands
[3] ERR_LOC_SAT_CH6_7 (R)
An error specific to CH6_7_SAT_ERR
reg is active
[0] ERR_LOC_SAT_CH0_1 (R)
An error specific to CH0_1_SAT_ERR
reg is active
[1] ERR_LOC_SAT_CH2_3 (R)
An error specific to CH2_3_SAT_ERR
reg is active
[2] ERR_LOC_SAT_CH4_5 (R)
An error specific to CH4_5_SAT_ERR
reg is active
Table 138. Bit Descriptions for STATUS_REG_3
Bits Bit Name
Settings Description
[7:6] RESERVED
Reserved
5 CHIP_ERROR
Set high if any error bit is high.
4 INIT_COMPLETE
Fuse initialization is complete. Device is ready to receive commands.
3 ERR_LOC_SAT_CH6_7
An error specific to CH6_7_SAT_ERR register is active.
2 ERR_LOC_SAT_CH4_5
An error specific to CH4_5_SAT_ERR register is active.
1 ERR_LOC_SAT_CH2_3
An error specific to CH2_3_SAT_ERR register is active.
0 ERR_LOC_SAT_CH0_1
An error specific to CH0_1_SAT_ERR register is active.
Rev. A | Page 91 of 94
AD7770
Reset
0x0
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Access
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Reset
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Reset
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