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ADUM7440_11 Datasheet, PDF (9/20 Pages) Analog Devices – 1 kV RMS Quad-Channel Digital Isolators
ADuM7440/ADuM7441/ADuM7442
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
VDD1A 1
GND1* 2
VIA 3
VIB 4
VIC 5
VID 6
VDD1B 7
GND1* 8
ADuM7440
TOP VIEW
(Not to Scale)
16 VDD2A
15 GND2*
14 VOA
13 VOB
12 VOC
11 VOD
10 VDD2B
9 GND2*
*PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED. CONNECTING BOTH
TO GND1 IS RECOMMENDED. PIN 9 AND PIN 15 ARE INTERNALLY
CONNECTED. CONNECTING BOTH TO GND2 IS RECOMMENDED.
Figure 5. ADuM7440 Pin Configuration
Table 20. ADuM7440 Pin Function Descriptions
Pin No. Mnemonic Description
1
VDD1A
Supply Voltage A for Isolator Side 1 (3.0 V to 5.5 V). Pin 1 must be connected externally to Pin 7. Connect a ceramic
bypass capacitor of value 0.01 µF to 0.1 µF between VDD1A (Pin 1) and GND1 (Pin 2).
2
GND1
Ground 1. Ground reference for Isolator Side 1. Pin 2 and Pin 8 are internally connected, and connecting both to GND1 is
recommended.
3
VIA
Logic Input A.
4
VIB
Logic Input B.
5
VIC
Logic Input C.
6
VID
Logic Input D.
7
VDD1B
Supply Voltage B for Isolator Side 1 (3.0 V to 5.5 V). Pin 7 must be connected externally to Pin 1. Connect a ceramic
bypass capacitor of value 0.01 µF to 0.1 µF between VDD1B (Pin 7) and GND1 (Pin 8).
8
GND1
Ground 1. Ground reference for Isolator Side 1. Pin 2 and Pin 8 are internally connected, and connecting both to GND1 is
recommended.
9
GND2
Ground 2. Ground reference for Isolator Side 2. Pin 9 and Pin 15 are internally connected, and connecting both to GND2 is
recommended.
10
VDD2B
Supply Voltage B for Isolator Side 2 (3.0 V to 5.5 V). Pin 10 must be connected externally to Pin 16. Connect a ceramic
bypass capacitor of value 0.01 µF to 0.1 µF between VDD2B (Pin 10) and GND2 (Pin 9).
11
VOD
Logic Output D.
12
VOC
Logic Output C.
13
VOB
Logic Output B.
14
VOA
Logic Output A.
15
GND2
Ground 2. Ground reference for Isolator Side 2. Pin 9 and Pin 15 are internally connected, and connecting both to GND2 is
recommended.
16
VDD2A
Supply Voltage A for Isolator Side 2 (3.0 V to 5.5 V). Pin 16 must be connected externally to Pin 10. Connect a
ceramic bypass capacitor of value 0.01 µF to 0.1 µF between VDD2A (Pin 16) and GND2 (Pin 15).
Rev. B | Page 9 of 20