ADUM1280WCRZ Datasheet, PDF (9/20 Pages) Analog Devices – 3 kV RMS Dual Channel Digital Isolators

Data Sheet
ADuM1280/ADuM1281/ADuM1285/ADuM1286
ELECTRICAL CHARACTERISTICS—MIXED 3 V/5 V OPERATION (WA, WB, AND WC GRADES)
All typical specifications are at TA = 25°C, VDD1 = 3.0 V, VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended
operation range: 3.0 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V; and −40°C ≤ TA ≤ 125°C; unless otherwise noted. Switching specifications are
tested with CL=15 pF and CMOS signal levels, unless otherwise noted.
Table 19.
Parameter
SWITCHING SPECIFICATIONS
Pulse Width
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
Symbol
PW
tPHL, tPLH
PWD
tPSK
WA Grade
WB Grade
WC Grade
Min Typ Min Min Typ Max Min Typ Max Unit
1000
7
40
1
50
10
3
38
10
ns
25
100 Mbps
35 16 24 30 ns
3
2.5 ns
1.5
ps/C
16
12 ns
Channel Matching
Codirectional
tPSKCD
Opposing-Direction
tPSKOD
Jitter
7 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing-directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier.
5
10
2
Table 20.
Parameter
SUPPLY CURRENT
ADuM1280/ADuM1285
ADuM1281/ADuM1286
Symbol
IDD1
IDD2
IDD1
IDD2
1 Mbps–WA, WB, WC
Grades
Min Typ Min
0.75 1.4
2.7 4.5
1.6 2.1
1.7 2.3
3
6
2
25 Mbps–WB, WC
Grades
Min Typ Max
5.1 9.0
4.8 7.0
3.8 5.0
3.9 6.2
2.5 ns
5
ns
1
ns
100 Mbps–WC Grade
Min Typ Max
17 23
9.5 15
11 15
11 15
Test Conditions
Within PWD limit
Within PWD limit
50% input to 50% output
|tPLH − tPHL|
Between any two units at
same operating conditions
Unit Test Conditions
No load
mA
mA
mA
mA
Table 21. For All Models
Parameter
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Input Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
Undervoltage-Lockout
Positive VDDX Threshold
Negative VDDX Threshold
VDDX Hysteresis
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient Immunity¹
Refresh Period
Symbol Min
VIH
0.7 VDDx
VIL
VOH
VDDx − 0.1
VDDx − 0.4
VOL
II
−10
IDDI(Q)
IDDO(Q)
IDDI(D)
IDDO(D)
VDDxUV+
VDDxUV−
VDDxUVH
tR/tF
|CM|
25
tr
Typ
Max
VDDx
VDDx − 0.2
0.0
0.2
+0.01
0.4
1.6
0.08
0.03
2.6
2.4
0.2
2.5
35
1.6
0.3 VDDx
0.1
0.4
+10
0.75
2.0
Unit
Test Conditions
V
V
V
IOx = −20 μA, VIx = VIxH
V
IOx = −4 mA, VIx = VIxH
V
IOx = 20 μA, VIx = VIxL
V
IOx = 4 mA, VIx = VIxL
μA
0 V ≤ VIx ≤ VDDx
mA
mA
mA/Mbps
mA/Mbps
V
V
V
ns
kV/μs
μs
10% to 90%
VIx = VDDx, VCM = 1000 V,
transient magnitude = 800 V
1_{|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining Vo > 0.8 VDDX. The common-mode voltage slew rates apply to both}
rising and falling common-mode voltage edges.
Rev. A | Page 9 of 20