AD9246_15 Datasheet, PDF (9/44 Pages) Analog Devices – 14-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Analog-to-Digital Converter

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
D2 1
D3 2
D4 3
D5 4
D6 5
D7 6
DRGND 7
DRVDD 8
D8 9
D9 10
D10 11
D11 12
PIN 1
INDICATOR
AD9246
TOP VIEW
(Not to Scale)
36 PDWN
35 RBIAS
34 CML
33 AVDD
32 AGND
31 VIN–
30 VIN+
29 AGND
28 REFT
27 REFB
26 VREF
25 SENSE
AD9246
Table 7. Pin Function Description
Pin No.
Mnemonic
0, 21, 23, 29, 32,
37, 41
AGND
45, 46, 1 to 6,
9 to 14
D0 (LSB) to D13 (MSB)
7, 16, 47
DRGND
8, 17, 48
DRVDD
15
OR
18
SDIO/DCS
19
20
22, 24, 33, 40, 42
25
26
27
28
30
31
34
35
SCLK/DFS
CSB
AVDD
SENSE
VREF
REFB
REFT
VIN+
VIN–
CML
RBIAS
36
PDWN
38
CLK+
39
CLK–
43
OEB
44
DCO
Figure 3. Pin Configuration
Description
Analog Ground. (Pin 0 is the exposed thermal pad on the bottom of the package.)
Data Output Bits.
Digital Output Ground.
Digital Output Driver Supply (1.8 V to 3.3 V).
Out-of-Range Indicator.
Serial Port Interface (SPI)® Data Input/Output (Serial Port Mode); Duty Cycle Stabilizer Select
(External Pin Mode). See Table 10.
Serial Port Interface Clock (Serial Port Mode); Data Format Select Pin (External Pin Mode).
Serial Port Interface Chip Select (Active Low). See Table 10.
Analog Power Supply.
Reference Mode Selection. See Table 9.
Voltage Reference Input/Output.
Differential Reference (−).
Differential Reference (+).
Analog Input Pin (+).
Analog Input Pin (−).
Common-Mode Level Bias Output.
External Bias Resistor Connection. A 10 kΩ resistor must be connected between this pin and
analog ground (AGND).
Power-Down Function Select.
Clock Input (+).
Clock Input (−).
Output Enable (Active Low).
Data Clock Output.
Rev. A | Page 9 of 44