AD6622_15 Datasheet, PDF (9/28 Pages) Analog Devices – Four-Channel, 75 MSPS Digital Transmit Signal Processor

AD6622
PIN FUNCTION DESCRIPTIONS
Pin Number
Name
1, 3–5, 9, 19–21, 31, 32,
GND
34–36, 38, 39, 42, 52–54,
63–65, 68, 69, 72, 73, 83–85,
95, 96, 98, 99, 102, 103,
105, 115–117, 126, 128
2
OEN
27–29, 22–25, 15–18, 10–13, OUT[17:0]
6–8
14, 26, 41, 47, 122
VDD
59, 66, 78, 90, 104, 110, 127 VDD
30
QOUT
33, 37, 40, 43–46, 48
49
D[7:0]
DS (RD)
50
DTACK (RDY)
51
55
56–58
60
61
62
R/W (WR)
MODE
A[2:0]
CS
RESET
SYNC
67
CLK
70
QIN
71, 74–77, 79–82, 86–89,
91–94, 97
100
101
106
107
108
109
111
112
113
114
118
119
120
121
123
124
125
IN[17:0]
TRST
TCK
TMS
TDO
TDI
SCLKA
SDFSA
SDINA
SCLKB
SDFSB
SDINB
SCLKC
SDFSC
SDINC
SCLKD
SDFSD
SDIND
Type Description
P
Ground Connection
I
Active High Output Enable Pin (Actively Pulled Down If Not Connected)
(Not 5 V Tolerant)
O/T Wideband Output Data
P
P
O/T
I/O/T
I
O
I
I
I
I
I
I
I
I
I
I
I
I
O
I
O
O
I
O
O
I
O
O
I
O
O
I
+3.0 V Supply (I/O Supply)
+3.0 V Supply (Core Supply)
Indicates Q Output Data (Complex Output Mode)
Microprocessor Interface Data
INM Mode: Read Signal, MNM Mode: Data Strobe Signal
Acknowledgment of a Completed Transaction (Signals when µP Port
Is Ready for an Access) Open Drain, Must Be Pulled Up Externally
Read/Write Line (Write Signal)
Sets Microport Mode: MODE = 1, MNM Mode; MODE = 0, INM Mode
Microprocessor Interface Address
Chip Select, Enable the Chip for µP Access
Active Low Reset Pin (Actively Pulled Up If Not Connected)
SYNC Signal for Synchronizing Multiple AD6622s (Actively Pulled
Down If Not Connected)
Input Clock (Actively Pulled Down If Not Connected)
Indicates Q Input Data (Complex Input Mode) (Actively Pulled Down
If Not Connected) (Not 5 V Tolerant)
Wideband Input Data (Allows Cascade of Multiple AD6622 Chips In
a System) (Actively Pulled Down If Not Connected) (Not 5 V Tolerant)
Test Reset Pin (Actively Pulled Up If Not Connected)
Test Clock Input (Actively Pulled Down If Not Connected)
Test Mode Select (Actively Pulled Up If Not Connected)
Test Data Output
Test Data Input (Actively Pulled Down If Not Connected)
Serial Clock Output Channel A
Serial Data Frame Sync Output Channel A
Serial Data Input Channel A (Actively Pulled Down If Not Connected)
Serial Clock Output Channel B
Serial Data Frame Sync Output Channel B
Serial Data Input Channel B (Actively Pulled Down If Not Connected)
Serial Clock Output Channel C
Serial Data Frame Sync Output Channel C
Serial Data Input Channel C (Actively Pulled Down If Not Connected)
Serial Clock Output Channel D
Serial Data Frame Sync Output Channel D
Serial Data Input Channel D (Actively Pulled Down If Not Connected)
REV. 0
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