AD652JPZ-REEL Datasheet, PDF (9/28 Pages) Analog Devices – Monolithic Synchronous Voltage-to-Frequency Converter

AD652
SVFC CONNECTION FOR DUAL SUPPLY, POSITIVE
INPUT VOLTAGES
Figure 8 shows the AD652 connection scheme for the
traditional dual supply, positive input mode of operation. The
±VS range is from ±6 V to ±18 V. When +VS is lower than 9.0 V,
As shown in Figure 8, three additional connections are required
The first connection is to short Pin 13 to Pin 8 (Analog Ground
to −VS) and add a pull-up resistor to +VS (as shown in
Figure 21). The pull-up resistor is determined by the following
equation:
R _PULLUP
=
2V_S − 5 V
500 µA
These connections ensure proper operation of the 5 V reference.
Tie Pin 16 to Pin 6 (as shown in Figure 21) to ensure that the
integrator output ramps down far enough to trip the
comparator.
The CERDIP-packaged AD652 accepts either a 0 V to 10 V or
0 mA to 0.5 mA full-scale input signal. The temperature drift of
+V_S
the AD652 is specified for a 0 V to 10 V input range using the
internal 20 kΩ resistor. If a current input is used, the gain drift is
degraded by a maximum of 100 ppm/°C (the TC of the 20 kΩ
resistor). If an external resistor is connected to Pin 5 to establish
a different input voltage range, drift is induced to the extent that
the external resistor’s TC differs from the TC of the internal
resistor. The external resistor used to establish a different input
voltage range should be selected to provide a full-scale current
of 0.5 mA (i.e., 10 kΩ for 0 V to 5 V).
SVFC CONNECTIONS FOR NEGATIVE INPUT
VOLTAGES
Voltages that are negative with respect to ground may be used
as the input to the AD652 SVFC. In this case, Pin 7 is grounded
and the input voltage is applied to Pin 6 (see Figure 9). In this
mode, the input voltage can go as low as 4 V above −VS. In this
configuration, the input is a high impedance, and only the
20 nA (typical) input bias current of the op amp must be
supplied by the input signal. This is contrasted with the more
usual positive input voltage configuration, which has a 20 kΩ
input impedance and requires 0.5 mA from the signal source.
C_INT
–
V_IN
+
–V_S
AD652
SYNCHRONOUS
VOLTAGE-TO-
1
FREQUENCY
CONVERTER
2
3
4
5
6
20kΩ
7
1mA
8
5V
REFERENCE
16
15
14
13
ONE
12
SHOT
11
10
Q CK
9
AND D _"D"
Q FLOP
ANALOG
GND
R_L
5V
DIGITAL
GND
FREQ
OUT
CLOCK
+V_S
Figure 8. Standard V/F Connection for Positive Input Voltage with Dual Supply
+V_S
C_INT
–
V_IN
+
AD652
SYNCHRONOUS
VOLTAGE-TO-
1
FREQUENCY
CONVERTER
2
3
4
5
6
20kΩ
7
1mA
8
–V_S
5V
REFERENCE
16
15
14
13
ONE
12
SHOT
11
10
Q CK
9
AND D _"D"
Q FLOP
ANALOG
GND
R_L
5V
DIGITAL
GND
FREQ
OUT
CLOCK
+V_S
Figure 9. Negative Voltage Input
Rev. C | Page 9 of 28