AD1928_15 Datasheet, PDF (9/32 Pages) Analog Devices – 2 ADC/8 DAC with PLL, 192 kHz, 24-Bit Codec

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
48 47 46 45 44 43 42 41 40 39 38 37
AGND 1
MCLKI/XI 2
MCLKO/XO 3
AGND 4
AVDD 5
OL3 6
OR3 7
OL4 8
OR4 9
PD/RST 10
DSDATA4 11
DGND 12
AD1928
TOP VIEW
(Not to Scale)
SINGLE-ENDED
OUTPUT
36 AGND
35 FILTR
34 AGND
33 AVDD
32 AGND
31 OR2
30 OL2
29 OR1
28 OL1
27 CLATCH
26 CCLK
25 DGND
13 14 15 16 17 18 19 20 21 22 23 24
AD1928
NC = NO CONNECT
Figure 2. Pin Configuration, 48-Lead LQFP
Table 10. Pin Function Descriptions
Pin No. Input/Output Mnemonic
1
I
AGND
2
I
MCLKI/XI
3
O
MCLKO/XO
4
I
AGND
5
I
AVDD
6
O
OL3
7
O
OR3
8
O
OL4
9
O
OR4
10
I
PD/RST
11
I/O
DSDATA4
12
I
13
I
14
I/O
DGND
DVDD
DSDATA3
15
I/O
DSDATA2
16
I
17
I/O
18
I/O
19
I/O
20
O
21
I/O
22
I/O
23
I
24
I/O
DSDATA1
DBCLK
DLRCLK
ASDATA1
ADCTDMOUT
ABCLK
ALRCLK
CIN
COUT
Description
Analog Ground.
Master Clock Input/Crystal Oscillator Input.
Master Clock Output/Crystal Oscillator Output.
Analog Ground.
Analog Power Supply. Connect to analog 3.3 V supply.
DAC Left 3 Output.
DAC Right 3Output.
DAC Left 4 Output.
DAC Right 4 Output.
Power-Down Reset (Active Low).
DAC Serial Data Input 4. Data input to DAC4 data in/TDM DAC2 data out (dual-line
mode)/AUX DAC2 data out (to external DAC2).
Digital Ground.
Digital Power Supply. Connect to digital 3.3 V supply.
DAC Serial Data Input 3. Data input to DAC3 data in/TDM DAC2 data in (dual-line
mode)/AUX ADC2 data in (from external ADC2).
DAC Serial Data Input 2. Data input to DAC2 data in/TDM DAC data out/AUX ADC1 data in
(from external ADC1).
DAC Serial Data Input 1. Data input to DAC1 data in/TDM DAC data in/TDM data in.
Bit Clock for DACs.
LR Clock for DACs.
ADC Serial Data Output 1. Data output from ADC1/TDM ADC data out/TDM data out.
ADC TDM Data Output.
Bit Clock for ADCs.
LR Clock for ADCs.
Control Data Input (SPI).
Control Data Output (SPI).
Rev. B | Page 9 of 32