ADV7189_15 Datasheet, PDF (81/104 Pages) Analog Devices – Multiformat SDTV Video Decoder

ADV7189
Table 187. Register 0x31
Bit
Subaddress Register
Bit Description
7 6 5 4 3 2 1 0 Comments
Notes
0x31
VS and
FIELD
Control 1
Reserved.
HVSTIM. Selects where
within a line of video the VS
signal is asserted.
0 1 0 Set to default
0
Start of line relative to HSE HSE = Hsync end
1
Start of line relative to HSB HSB = Hsync begin
NEWAVMODE. Sets the
EAV/SAV mode.
0
EAV/SAV codes generated
to suit ADI encoders
Reserved.
1
000
Manual VS/Field position
controlled by Registers
0x32, 0x33, and 0xE5–0xEA
Set to default
E _{Table 188. Registers 0x32 to 0x33}
Bit
T ^{Subaddress Register}
Bit Description 7 6 5 4 3 2 1 0 Comments
Notes
0x32
VSync Field
Control 2
Reserved.
0 0 0 0 0 1 Set to default.
VSBHE.
E ₀
VS goes high in the middle of
the line (even field).
NEWAVMODE bit must
be set high.
1
VS changes state at the start of
the line (even field).
L _VSBHO.
0
VS goes high in the middle of
the line (odd field).
1
VS changes state at the start of
O the line (odd field).
0x33
VSync Field
Control 3
Reserved.
0 0 0 1 0 0 Set to default.
VSEHE.
S₀
NEWAVMODE bit must
VS goes low in the middle of the ^{be set high.}
line (even field).
1
VS changes state at the start of
the line (even field).
B_VSEHO.
0
VS goes low in the middle of the
line (odd field).
1
VS changes state at the start of
O ^{the line odd field.}
Rev. B | Page 81 of 104