ADSP-2141L_15 Datasheet, PDF (8/39 Pages) Analog Devices – highly integrated embedded security processor that incorporates a sophisticated

ADSP-2141L
Interrupt Controller
The DSP core of the ADSP-2141L provides a powerful set of
interrupt sources. A total of 14 interrupt sources are available,
although two pairs are multiplexed, yielding 12 simultaneous
sources. Refer to Table I.
The ADSP-2141L enhances the existing interrupt controller
within the ADSP-218x DSP Core with some additional func-
tions related to the crypto functional blocks and the external
host bus interfaces. Two additional interrupt controller sub-
systems have been added to the basic interrupt controller as
shown in Figure 5.
The DSP interrupt controller allows programming between one
and nine sources for the IRQ2 interrupt to the DSP. The
DIMASK register provides the mask to select which interrupt
source is enabled. A pair of status registers, DUMSTAT and
DMSTAT, allow the DSP firmware to read the status of any
interrupt source either before or after the mask is applied.
The host interrupt controller allows programming between one
and five sources for the PF7/INT_H interrupt output signal
(which may be connected to the interrupt input of the host
system). The HMASK register provides the mask to select which
interrupt source is enabled. A pair of status registers, HUMSTAT
and HMSTAT, allow the host firmware to read the status of any
interrupt source either before or after the mask is applied.
Laser Variable Storage
The laser variables are configured through 256 Fuses in the
ADSP-2141L, which are programmed during IC manufacture.
Each ADSP-2141L produced is programmed with a unique set
of Laser Variables.
• Local Storage Variable (LSV—the Master Key-Encryption-Key)
• Internal Seed Variable
• 48-Bit Program Control Data (enables/disables various fea-
tures and configures the ADSP-2141L)
• CRC of the Laser Data (to verify integrity of the laser bits)
The LSV is a unique triple DES master key-encrypting key that
allows the ADSP-2141L to securely store data (primarily other keys)
off-chip for later reloading. This is necessary if more storage space
is needed than is available with on-chip RAM, or if keys need to
be saved and restored after a power outage. Each ADSP-2141L
produced is programmed with a unique, randomly generated
local storage variable.
The internal seed variable is used to randomly initialize the
RNG circuits before the entropy is mixed in. Each ADSP-2141L
produced is programmed with a unique, randomly generated
internal seed variable which is loaded into the RNG at chip boot
time and cannot ever be read by software.
The 48 Program Control Data Bits (PCDBs) include configura-
tion for permitted key lengths, algorithm enables, red KEK
loading, internal IC pulse timing characteristics. The PCDBs
provide configuration data that falls into three categories:
• Internal IC pulse-timing characteristics
• ADSP-2141L hardware version number field
• ADSP-2141L feature enables
The first two categories consist of data that cannot be altered
once the ADSP-2141L has been fabricated.
The feature enables can be overridden using a factory token
enabler which may be passed to the CGX kernel as part of the
CGX_INIT command. This token is digitally signed with an
IRE private key and verified internal to the ADSP-2141L with
its public key. The CGX_INIT command is documented in the
ADSP-2141 CGX Interface Programmer’s Guide (available from
http://www.ire-ma.com/proddoc.htm).
DSP
INTERNAL
INTERRUPTS
RESET
POWER DOWN
SPORT0 Tx
SPORT0 Rx
BDMA INT
TIMER INT
SPORT1 Tx
SPORT1 Rx
ADSP-2183
INTERRUPT
CONTROLLER
ICNTL
IMASK
IFC
IRQ2
EXTERNAL
INTERRUPTS
IRQE
IRQL0
IRQL1
IRQ0
IRQ1
IRQ2
CRYPTO INTERRUPT
SUBSYSTEM BOUNDRY
DSP INTERRUPT CONTROLLER
DICFG
DICLR
DIFRC
DIMASK
HOST
INTERRUPT
H/E CONTEXT1
DONE
H/E CONTEXT0
DONE
HOST
WROTE CMD
DMA xFER
DONE
DMA xFER
QUEUED
EXT MEM
CONFLICT
HASH/ENC
ERROR
IRQ2
HOST INTERRUPT CONTROLLER
DSP
INTERRUPT
HICFG
HICLR
HIFRC
HIMASK
H/E CONTEXT1
DONE
H/E CONTEXT0
DONE
DSP
WROTE
CMD
HASH/ENC
ERROR
Figure 5. Interrupt Controller Block Diagram
–8–
INTH
TO HOST
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