ADAU1761 Datasheet, PDF (8/92 Pages) Analog Devices – SigmaDSP Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL

ADAU1761
TYPICAL CURRENT CONSUMPTION
Master clock = 12.288 MHz, input sample rate = 48 kHz, input tone = 1 kHz, normal power management settings, ADC input @ −1 dBFS,
DAC input @ 0 dBFS. For total power consumption, add the IOVDD current listed in Table 2.
Table 3.
Operating Voltage
AVDD = IOVDD = 3.3 V
AVDD = IOVDD = 1.8 V
Audio Path
Record stereo differential to ADC
DAC stereo playback to line output (10 kΩ)
DAC stereo playback to headphone (16 Ω)
DAC stereo playback to headphone (32 Ω)
DAC stereo playback to capless headphone (32 Ω)
Record aux stereo bypass to line output (10 kΩ)
Record stereo differential to ADC
DAC stereo playback to line output (10 kΩ)
DAC stereo playback to headphone (16 Ω)
DAC stereo playback to headphone (32 Ω)
DAC stereo playback to capless headphone (32 Ω)
Record aux stereo bypass to line output (10 kΩ)
Clock Generation
Direct MCLK
Integer PLL
Direct MCLK
Integer PLL
Direct MCLK
Integer PLL
Direct MCLK
Integer PLL
Direct MCLK
Integer PLL
Direct MCLK
Integer PLL
Direct MCLK
Integer PLL
Direct MCLK
Integer PLL
Direct MCLK
Integer PLL
Direct MCLK
Integer PLL
Direct MCLK
Integer PLL
Direct MCLK
Integer PLL
Typical AVDD Current
Consumption (mA)
5.24
6.57
5.55
6.90
55.5
56.8
30.9
32.25
56.75
58
1.9
3.3
4.25
5.55
4.7
5.7
30.81
32
18.3
19.5
32.6
33.7
1.9
3.07
Rev. C | Page 8 of 92