English
Language : 

AD9949 Datasheet, PDF (8/36 Pages) Analog Devices – 12-Bit CCD Signal Processor with Precision Timing Core
AD9949
TERMINOLOGY
Differential Nonlinearity (DNL)
An ideal ADC exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. Thus, every
code must have a finite width. No missing codes guaranteed to
12-bit resolution indicates that all 4096 codes, respectively, must
be present over all operating conditions.
Integral Nonlinearity (INL)
INL is the deviation of each individual code measured from a
true straight line from zero to full scale. The point used as zero
scale occurs 0.5 LSB before the first code transition. Positive full
scale is defined as a level 1 LSB and 0.5 LSB beyond the last
code transition. The deviation is measured from the middle of
each particular output code to the true straight line.
Peak Nonlinearity
Peak nonlinearity, a full signal chain specification, refers to the
peak deviation of the output of the AD9949 from a straight line.
The point used as zero scale occurs 0.5 LSB before the first code
transition. Positive full scale is defined as a level 1 LSB and
0.5 LSB beyond the last code transition. The deviation is
measured from the middle of each particular output code to the
straight line reference. The error is then expressed as a
percentage of the 2 V ADC full-scale signal. The input signal is
appropriately gained up to fill the ADC’s full-scale range.
Total Output Noise
The rms output noise is measured using histogram techniques.
The standard deviation of the ADC output codes is calculated
in LSB and represents the rms noise level of the total signal
chain at the specified gain setting. The output noise can be con-
verted to an equivalent voltage, using the relationship
1 LSB = (ADC full scale/2n codes)
where n is the bit resolution of the ADC. For the AD9949,
1 LSB is approximately 0.488 mV.
Power Supply Rejection (PSR)
The PSR is measured with a step change applied to the supply
pins. The PSR specification is calculated from the change in the
data outputs for a given step change in the supply voltage.
Rev. B | Page 8 of 36