AD6645ASQZ-105 Datasheet, PDF (8/24 Pages) Analog Devices – 14-Bit, 80 MSPS/105 MSPS A/D Converter

AD6645
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
52 51 50 49 48 47 46 45 44 43 42 41 40
DV_CC 1
GND 2
VREF 3
GND 4
ENCODE 5
ENCODE 6
GND 7
AV_CC 8
AV_CC 9
GND 10
AIN 11
AIN 12
GND 13
PIN 1
IDENTIFIER
AD6645
TOP VIEW
(Not to Scale)
39 D3
38 D2
37 D1
36 D0 (LSB)
35 DMID
34 GND
33 DV_CC
32 OVR
31 DNC
30 AV_CC
29 GND
28 AV_CC
27 GND
14 15 16 17 18 19 20 21 22 23 24 25 26
NOTES
1. DNC = DO NOT CONNECT.
2. EXPOSED PAD. CONNECT THE EXPOSED PAD TO GND.
Figure 3. Pin Configuration
Table 7. Pin Function Descriptions
Pin Number
Mnemonic
1, 33, 43
DVCC
2, 4, 7, 10, 13, 15, 17, 19, 21, 23, 25, GND
27, 29, 34, 42
3
VREF
5
ENCODE
6
ENCODE
8, 9, 14, 16, 18, 22, 26, 28, 30
AVCC
11
AIN
12
AIN
20
C1
24
C2
31
DNC
32
OVR
35
DMID
36
D0 (LSB)
37 to 41, 44 to 50
D1 to D5, D6 to D12
51
D13 (MSB)
52
DRY
53 (EPAD)
Exposed Paddle (EPAD)
Description
3.3 V Power Supply (Digital) Output Stage Only.
Ground.
2.4 V Reference. Bypass to ground with a 0.1 μF microwave chip capacitor.
Encode Input. Conversion initiated on rising edge.
Complement of ENCODE, Differential Input.
5 V Analog Power Supply.
Analog Input.
Complement of AIN, Differential Analog Input.
Internal Voltage Reference. Bypass to ground with a 0.1 μF chip capacitor.
Internal Voltage Reference. Bypass to ground with a 0.1 μF chip capacitor.
Do not connect this pin.
Overrange Bit. A logic level high indicates analog input exceeds ±FS.
Output Data Voltage Midpoint. Approximately equal to (DVCC)/2.
Digital Output Bit (Least Significant Bit); Twos Complement.
Digital Output Bits in Twos Complement.
Digital Output Bit (Most Significant Bit); Twos Complement.
Data-Ready Output.
Exposed Pad. Connect the exposed pad to GND.
Rev. D | Page 8 of 24